-
Notifications
You must be signed in to change notification settings - Fork 1
Expand file tree
/
Copy pathtest_infer_reversal.py
More file actions
executable file
·72 lines (56 loc) · 2.17 KB
/
test_infer_reversal.py
File metadata and controls
executable file
·72 lines (56 loc) · 2.17 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
#!/usr/bin/env python3
import os
import unittest
import sys
import tempfile
from syncropatch_export.trace import Trace
from pcpostprocess import infer_reversal, leak_correct
from pcpostprocess.detect_ramp_bounds import detect_ramp_bounds
store_output = False
class TestInferReversal(unittest.TestCase):
"""
Tests the `infer_reversal` method.
"""
@classmethod
def setUpClass(self):
if store_output: # pragma: no cover
self.temp_dir = None
self.plot_dir = os.path.join('test_output', 'infer_reversal')
os.makedirs(self.plot_dir, exist_ok=True)
else:
self.temp_dir = tempfile.TemporaryDirectory()
self.plot_dir = self.temp_dir.name
@classmethod
def tearDownClass(self):
if self.temp_dir:
self.temp_dir.cleanup()
def test_infer_reversal(self):
# Test infer_reversal_potential, including plot
# Load test data
data = os.path.join('test_data', '13112023_MW2_FF',
'staircaseramp (2)_2kHz_15.01.07')
trace = Trace(data, 'staircaseramp (2)_2kHz_15.01.07.json')
# Get times and voltages
times = trace.get_times()
voltages = trace.get_voltage()
# Get protocol and leak ramp indices
protocol = trace.get_voltage_protocol().get_all_sections()
leak_indices = detect_ramp_bounds(times, protocol, ramp_index=0)
# Load current for one well, one sweep, and leak correct
well, sweep = 'A03', 0
current = trace.get_trace_sweeps(sweeps=[sweep])[well][0]
_, leak = leak_correct.fit_linear_leak(
current, voltages, times, *leak_indices)
current -= leak
# Estimate reversal potential
fpath = os.path.join(self.plot_dir, f'{well}-{sweep}.png')
erev = infer_reversal.infer_reversal_potential(
current, times, protocol, voltages, fpath, -89.57184)
self.assertAlmostEqual(erev, -89.57184, 5)
if __name__ == "__main__": # pragma: no cover
if '-store' in sys.argv:
store_output = True
sys.argv.remove('-store')
else:
print('Add -store to store output')
unittest.main()