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CoreforgeCoreforge
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rx7000
1 parent ad81642 commit 4233314

13 files changed

Lines changed: 51 additions & 51 deletions

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‎drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -291,7 +291,7 @@ int amdgpu_mes_create_process(struct amdgpu_device *adev, int pasid,
291291
DRM_ERROR("failed to allocate process context bo\n");
292292
goto clean_up_memory;
293293
}
294-
memset(process->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
294+
memset_io(process->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
295295

296296
/*
297297
* Avoid taking any other locks under MES lock to avoid circular
@@ -415,7 +415,7 @@ int amdgpu_mes_add_gang(struct amdgpu_device *adev, int pasid,
415415
DRM_ERROR("failed to allocate process context bo\n");
416416
goto clean_up_mem;
417417
}
418-
memset(gang->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);
418+
memset_io(gang->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);
419419

420420
/*
421421
* Avoid taking any other locks under MES lock to avoid circular
@@ -563,7 +563,7 @@ static int amdgpu_mes_queue_alloc_mqd(struct amdgpu_device *adev,
563563
dev_warn(adev->dev, "failed to create queue mqd bo (%d)", r);
564564
return r;
565565
}
566-
memset(q->mqd_cpu_ptr, 0, mqd_size);
566+
memset_io(q->mqd_cpu_ptr, 0, mqd_size);
567567

568568
r = amdgpu_bo_reserve(q->mqd_obj, false);
569569
if (unlikely(r != 0))
@@ -1279,7 +1279,7 @@ int amdgpu_mes_ctx_alloc_meta_data(struct amdgpu_device *adev,
12791279
if (!ctx_data->meta_data_obj)
12801280
return -ENOMEM;
12811281

1282-
memset(ctx_data->meta_data_ptr, 0,
1282+
memset_io(ctx_data->meta_data_ptr, 0,
12831283
sizeof(struct amdgpu_mes_ctx_meta_data));
12841284

12851285
return 0;

‎drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5577,7 +5577,7 @@ static void gfx_v10_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device *ade
55775577
if (fw_size > toc_fw_size)
55785578
fw_size = toc_fw_size;
55795579

5580-
memcpy(ptr + toc_offset, fw_data, fw_size);
5580+
memcpy_toio(ptr + toc_offset, fw_data, fw_size);
55815581

55825582
if (fw_size < toc_fw_size)
55835583
memset_io(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);

‎drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -938,7 +938,7 @@ static int gfx_v11_0_mec_init(struct amdgpu_device *adev)
938938
return r;
939939
}
940940

941-
memset(hpd, 0, mec_hpd_size);
941+
memset_io(hpd, 0, mec_hpd_size);
942942

943943
amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj);
944944
amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
@@ -1240,10 +1240,10 @@ static void gfx_v11_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device *ade
12401240
if (fw_size > toc_fw_size)
12411241
fw_size = toc_fw_size;
12421242

1243-
memcpy(ptr + toc_offset, fw_data, fw_size);
1243+
memcpy_toio(ptr + toc_offset, fw_data, fw_size);
12441244

12451245
if (fw_size < toc_fw_size)
1246-
memset(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);
1246+
memset_io(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);
12471247

12481248
if ((id != SOC21_FIRMWARE_ID_RS64_PFP) && (id != SOC21_FIRMWARE_ID_RS64_ME))
12491249
*(uint64_t *)fw_autoload_mask |= 1ULL << id;
@@ -3904,7 +3904,7 @@ static void gfx_v11_0_gfx_mqd_set_priority(struct amdgpu_device *adev,
39043904
static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,
39053905
struct amdgpu_mqd_prop *prop)
39063906
{
3907-
struct v11_gfx_mqd *mqd = m;
3907+
volatile struct v11_gfx_mqd *mqd = m;
39083908
uint64_t hqd_gpu_addr, wb_gpu_addr;
39093909
uint32_t tmp;
39103910
uint32_t rb_bufsz;
@@ -3991,7 +3991,7 @@ static int gfx_v11_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
39913991
int mqd_idx = ring - &adev->gfx.gfx_ring[0];
39923992

39933993
if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
3994-
memset((void *)mqd, 0, sizeof(*mqd));
3994+
memset_io((void *)mqd, 0, sizeof(*mqd));
39953995
mutex_lock(&adev->srbm_mutex);
39963996
soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
39973997
amdgpu_ring_init_mqd(ring);
@@ -4045,7 +4045,7 @@ static int gfx_v11_0_cp_async_gfx_ring_resume(struct amdgpu_device *adev)
40454045
static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
40464046
struct amdgpu_mqd_prop *prop)
40474047
{
4048-
struct v11_compute_mqd *mqd = m;
4048+
volatile struct v11_compute_mqd *mqd = m;
40494049
uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
40504050
uint32_t tmp;
40514051

@@ -4304,7 +4304,7 @@ static int gfx_v11_0_kiq_init_queue(struct amdgpu_ring *ring)
43044304
soc21_grbm_select(adev, 0, 0, 0, 0);
43054305
mutex_unlock(&adev->srbm_mutex);
43064306
} else {
4307-
memset((void *)mqd, 0, sizeof(*mqd));
4307+
memset_io((void *)mqd, 0, sizeof(*mqd));
43084308
if (amdgpu_sriov_vf(adev) && adev->in_suspend)
43094309
amdgpu_ring_clear_ring(ring);
43104310
mutex_lock(&adev->srbm_mutex);
@@ -4328,7 +4328,7 @@ static int gfx_v11_0_kcq_init_queue(struct amdgpu_ring *ring, bool reset)
43284328
int mqd_idx = ring - &adev->gfx.compute_ring[0];
43294329

43304330
if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
4331-
memset((void *)mqd, 0, sizeof(*mqd));
4331+
memset_io((void *)mqd, 0, sizeof(*mqd));
43324332
mutex_lock(&adev->srbm_mutex);
43334333
soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
43344334
amdgpu_ring_init_mqd(ring);

‎drivers/gpu/drm/amd/amdgpu/mes_v11_0.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -794,7 +794,7 @@ static int mes_v11_0_allocate_ucode_buffer(struct amdgpu_device *adev,
794794
return r;
795795
}
796796

797-
memcpy(adev->mes.ucode_fw_ptr[pipe], fw_data, fw_size);
797+
memcpy_toio(adev->mes.ucode_fw_ptr[pipe], fw_data, fw_size);
798798

799799
amdgpu_bo_kunmap(adev->mes.ucode_fw_obj[pipe]);
800800
amdgpu_bo_unreserve(adev->mes.ucode_fw_obj[pipe]);
@@ -835,7 +835,7 @@ static int mes_v11_0_allocate_ucode_data_buffer(struct amdgpu_device *adev,
835835
return r;
836836
}
837837

838-
memcpy(adev->mes.data_fw_ptr[pipe], fw_data, fw_size);
838+
memcpy_toio(adev->mes.data_fw_ptr[pipe], fw_data, fw_size);
839839

840840
amdgpu_bo_kunmap(adev->mes.data_fw_obj[pipe]);
841841
amdgpu_bo_unreserve(adev->mes.data_fw_obj[pipe]);
@@ -1023,7 +1023,7 @@ static int mes_v11_0_allocate_eop_buf(struct amdgpu_device *adev,
10231023
return r;
10241024
}
10251025

1026-
memset(eop, 0,
1026+
memset_io(eop, 0,
10271027
adev->mes.eop_gpu_obj[pipe]->tbo.base.size);
10281028

10291029
amdgpu_bo_kunmap(adev->mes.eop_gpu_obj[pipe]);
@@ -1034,11 +1034,11 @@ static int mes_v11_0_allocate_eop_buf(struct amdgpu_device *adev,
10341034

10351035
static int mes_v11_0_mqd_init(struct amdgpu_ring *ring)
10361036
{
1037-
struct v11_compute_mqd *mqd = ring->mqd_ptr;
1037+
volatile struct v11_compute_mqd *mqd = ring->mqd_ptr;
10381038
uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
10391039
uint32_t tmp;
10401040

1041-
memset(mqd, 0, sizeof(*mqd));
1041+
memset_io(mqd, 0, sizeof(*mqd));
10421042

10431043
mqd->header = 0xC0310800;
10441044
mqd->compute_pipelinestat_enable = 0x00000001;
@@ -1326,7 +1326,7 @@ static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev,
13261326
return r;
13271327
}
13281328

1329-
memset(ring->mqd_ptr, 0, mqd_size);
1329+
memset_io(ring->mqd_ptr, 0, mqd_size);
13301330

13311331
/* prepare MQD backup */
13321332
adev->mes.mqd_backup[pipe] = kmalloc(mqd_size, GFP_KERNEL);

‎drivers/gpu/drm/amd/amdgpu/psp_v13_0.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -236,10 +236,10 @@ static int psp_v13_0_bootloader_load_component(struct psp_context *psp,
236236
if (ret)
237237
return ret;
238238

239-
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
239+
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
240240

241241
/* Copy PSP KDB binary to memory */
242-
memcpy(psp->fw_pri_buf, bin_desc->start_addr, bin_desc->size_bytes);
242+
memcpy_toio(psp->fw_pri_buf, bin_desc->start_addr, bin_desc->size_bytes);
243243

244244
/* Provide the PSP KDB to bootloader */
245245
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,
@@ -313,10 +313,10 @@ static int psp_v13_0_bootloader_load_sos(struct psp_context *psp)
313313
if (ret)
314314
return ret;
315315

316-
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
316+
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
317317

318318
/* Copy Secure OS binary to PSP memory */
319-
memcpy(psp->fw_pri_buf, psp->sos.start_addr, psp->sos.size_bytes);
319+
memcpy_toio(psp->fw_pri_buf, psp->sos.start_addr, psp->sos.size_bytes);
320320

321321
/* Provide the PSP secure OS to bootloader */
322322
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,

‎drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -107,10 +107,10 @@ static int psp_v13_0_4_bootloader_load_component(struct psp_context *psp,
107107
if (ret)
108108
return ret;
109109

110-
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
110+
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
111111

112112
/* Copy PSP KDB binary to memory */
113-
memcpy(psp->fw_pri_buf, bin_desc->start_addr, bin_desc->size_bytes);
113+
memcpy_toio(psp->fw_pri_buf, bin_desc->start_addr, bin_desc->size_bytes);
114114

115115
/* Provide the PSP KDB to bootloader */
116116
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,
@@ -170,10 +170,10 @@ static int psp_v13_0_4_bootloader_load_sos(struct psp_context *psp)
170170
if (ret)
171171
return ret;
172172

173-
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
173+
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
174174

175175
/* Copy Secure OS binary to PSP memory */
176-
memcpy(psp->fw_pri_buf, psp->sos.start_addr, psp->sos.size_bytes);
176+
memcpy_toio(psp->fw_pri_buf, psp->sos.start_addr, psp->sos.size_bytes);
177177

178178
/* Provide the PSP secure OS to bootloader */
179179
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,

‎drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ static inline struct v11_sdma_mqd *get_sdma_mqd(void *mqd)
4444
static void update_cu_mask(struct mqd_manager *mm, void *mqd,
4545
struct mqd_update_info *minfo)
4646
{
47-
struct v11_compute_mqd *m;
47+
volatile struct v11_compute_mqd *m;
4848
uint32_t se_mask[KFD_MAX_NUM_SE] = {0};
4949
bool has_wa_flag = minfo && (minfo->update_flag & (UPDATE_FLAG_DBG_WA_ENABLE |
5050
UPDATE_FLAG_DBG_WA_DISABLE));
@@ -125,7 +125,7 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
125125
struct queue_properties *q)
126126
{
127127
uint64_t addr;
128-
struct v11_compute_mqd *m;
128+
volatile struct v11_compute_mqd *m;
129129
int size;
130130
uint32_t wa_mask = q->is_dbg_wa ? 0xffff : 0xffffffff;
131131

@@ -137,7 +137,7 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
137137
else
138138
size = sizeof(struct v11_compute_mqd);
139139

140-
memset(m, 0, size);
140+
memset_io(m, 0, size);
141141

142142
m->header = 0xC0310800;
143143
m->compute_pipelinestat_enable = 1;
@@ -219,7 +219,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
219219
struct queue_properties *q,
220220
struct mqd_update_info *minfo)
221221
{
222-
struct v11_compute_mqd *m;
222+
volatile struct v11_compute_mqd *m;
223223

224224
m = get_mqd(mqd);
225225

@@ -281,7 +281,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
281281

282282
static bool check_preemption_failed(struct mqd_manager *mm, void *mqd)
283283
{
284-
struct v11_compute_mqd *m = (struct v11_compute_mqd *)mqd;
284+
volatile struct v11_compute_mqd *m = (struct v11_compute_mqd *)mqd;
285285

286286
return kfd_check_hiq_mqd_doorbell_id(mm->dev, m->queue_doorbell_id0, 0);
287287
}
@@ -292,7 +292,7 @@ static int get_wave_state(struct mqd_manager *mm, void *mqd,
292292
u32 *ctl_stack_used_size,
293293
u32 *save_area_used_size)
294294
{
295-
struct v11_compute_mqd *m;
295+
volatile struct v11_compute_mqd *m;
296296
struct kfd_context_save_area_header header;
297297

298298
m = get_mqd(mqd);
@@ -325,11 +325,11 @@ static int get_wave_state(struct mqd_manager *mm, void *mqd,
325325

326326
static void checkpoint_mqd(struct mqd_manager *mm, void *mqd, void *mqd_dst, void *ctl_stack_dst)
327327
{
328-
struct v11_compute_mqd *m;
328+
volatile struct v11_compute_mqd *m;
329329

330330
m = get_mqd(mqd);
331331

332-
memcpy(mqd_dst, m, sizeof(struct v11_compute_mqd));
332+
memcpy_fromio(mqd_dst, m, sizeof(struct v11_compute_mqd));
333333
}
334334

335335
static void restore_mqd(struct mqd_manager *mm, void **mqd,
@@ -339,12 +339,12 @@ static void restore_mqd(struct mqd_manager *mm, void **mqd,
339339
const void *ctl_stack_src, const u32 ctl_stack_size)
340340
{
341341
uint64_t addr;
342-
struct v11_compute_mqd *m;
342+
volatile struct v11_compute_mqd *m;
343343

344344
m = (struct v11_compute_mqd *) mqd_mem_obj->cpu_ptr;
345345
addr = mqd_mem_obj->gpu_addr;
346346

347-
memcpy(m, mqd_src, sizeof(*m));
347+
memcpy_toio(m, mqd_src, sizeof(*m));
348348

349349
*mqd = m;
350350
if (gart_addr)
@@ -364,7 +364,7 @@ static void init_mqd_hiq(struct mqd_manager *mm, void **mqd,
364364
struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
365365
struct queue_properties *q)
366366
{
367-
struct v11_compute_mqd *m;
367+
volatile struct v11_compute_mqd *m;
368368

369369
init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q);
370370

@@ -379,7 +379,7 @@ static int destroy_hiq_mqd(struct mqd_manager *mm, void *mqd,
379379
uint32_t pipe_id, uint32_t queue_id)
380380
{
381381
int err;
382-
struct v11_compute_mqd *m;
382+
volatile struct v11_compute_mqd *m;
383383
u32 doorbell_off;
384384

385385
m = get_mqd(mqd);
@@ -408,7 +408,7 @@ static void init_mqd_sdma(struct mqd_manager *mm, void **mqd,
408408
else
409409
size = sizeof(struct v11_sdma_mqd);
410410

411-
memset(m, 0, size);
411+
memset_io(m, 0, size);
412412
*mqd = m;
413413
if (gart_addr)
414414
*gart_addr = mqd_mem_obj->gpu_addr;

‎drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -451,7 +451,7 @@ static void vg_notify_wm_ranges(struct clk_mgr *clk_mgr_base)
451451
if (!table || clk_mgr_vgh->smu_wm_set.mc_address.quad_part == 0)
452452
return;
453453

454-
memset(table, 0, sizeof(*table));
454+
memset_io(table, 0, sizeof(*table));
455455

456456
vg_build_watermark_ranges(clk_mgr_base->bw_params, table);
457457

@@ -649,7 +649,7 @@ static void vg_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr,
649649
if (!table || smu_dpm_clks->mc_address.quad_part == 0)
650650
return;
651651

652-
memset(table, 0, sizeof(*table));
652+
memset_io(table, 0, sizeof(*table));
653653

654654
dcn301_smu_set_dram_addr_high(clk_mgr,
655655
smu_dpm_clks->mc_address.high_part);

‎drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -486,7 +486,7 @@ static void dcn31_notify_wm_ranges(struct clk_mgr *clk_mgr_base)
486486
if (!table || clk_mgr_dcn31->smu_wm_set.mc_address.quad_part == 0)
487487
return;
488488

489-
memset(table, 0, sizeof(*table));
489+
memset_io(table, 0, sizeof(*table));
490490

491491
dcn31_build_watermark_ranges(clk_mgr_base->bw_params, table);
492492

@@ -508,7 +508,7 @@ static void dcn31_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr,
508508
if (!table || smu_dpm_clks->mc_address.quad_part == 0)
509509
return;
510510

511-
memset(table, 0, sizeof(*table));
511+
memset_io(table, 0, sizeof(*table));
512512

513513
dcn31_smu_set_dram_addr_high(clk_mgr,
514514
smu_dpm_clks->mc_address.high_part);

‎drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -550,7 +550,7 @@ static void dcn314_notify_wm_ranges(struct clk_mgr *clk_mgr_base)
550550
if (!table || clk_mgr_dcn314->smu_wm_set.mc_address.quad_part == 0)
551551
return;
552552

553-
memset(table, 0, sizeof(*table));
553+
memset_io(table, 0, sizeof(*table));
554554

555555
dcn314_build_watermark_ranges(clk_mgr_base->bw_params, table);
556556

@@ -572,7 +572,7 @@ static void dcn314_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr,
572572
if (!table || smu_dpm_clks->mc_address.quad_part == 0)
573573
return;
574574

575-
memset(table, 0, sizeof(*table));
575+
memset_io(table, 0, sizeof(*table));
576576

577577
dcn314_smu_set_dram_addr_high(clk_mgr,
578578
smu_dpm_clks->mc_address.high_part);

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