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6450 lines (6412 loc) · 177 KB
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diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index f15e5920080b..e0cc5ddfed7e 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,14 @@ config PPC_EARLY_DEBUG_PS3GELIC
Select this to enable early debugging for the PlayStation3 via
UDP broadcasts sent out through the Ethernet port.
+config PPC_EARLY_DEBUG_XENON
+ bool "Early debugging through Xenos framebuffer"
+ depends on PPC_XENON
+ select XENON_UDBG
+ help
+ Select this to enable early debugging for the Xenon via
+ early framebuffer support.
+
config PPC_EARLY_DEBUG_OPAL_RAW
bool "OPAL raw console"
depends on HVC_OPAL
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index 5a867f23fe7f..27bedf3de520 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -33,6 +33,7 @@ zImage.*lds
zImage.miboot
zImage.pmac
zImage.pseries
+zImage.xenon
zconf.h
zlib.h
zutil.h
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index c47b78c1d3e7..6b4cd7ce5c2d 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -277,6 +277,7 @@ quiet_cmd_wrap = WRAP $@
image-$(CONFIG_PPC_PSERIES) += zImage.pseries
image-$(CONFIG_PPC_POWERNV) += zImage.pseries
image-$(CONFIG_PPC_PS3) += dtbImage.ps3
+image-$(CONFIG_PPC_XENON) += zImage.xenon
image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
@@ -397,6 +398,11 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/dts/%.dtb FORCE
$(obj)/vmlinux.strip: vmlinux
$(STRIP) -s -R .comment $< -o $@
+$(obj)/zImage.xenon: $(obj)/vmlinux.strip
+ @$(OBJCOPY) -O elf32-powerpc $< $@
+ @test -e /mnt/e/Misc/tftpd64 && \
+ cp -f $@ /mnt/e/Misc/tftpd64/vmlinux || true
+
$(obj)/uImage: vmlinux $(wrapperbits) FORCE
$(call if_changed,wrap,uboot)
diff --git a/arch/powerpc/boot/dts/xenon.dts b/arch/powerpc/boot/dts/xenon.dts
new file mode 100644
index 000000000000..e7bd5ecc66d0
--- /dev/null
+++ b/arch/powerpc/boot/dts/xenon.dts
@@ -0,0 +1,131 @@
+/*
+ * xenon.dts - Xbox360 Game Console device tree.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/dts-v1/;
+
+/ {
+ model = "Xenon Game Console";
+ compatible = "XENON";
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ /*
+ * Bootargs will be created here, as well as initrd properties if relevant
+ */
+ chosen {
+ linux,platform = <0x00000801>;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x1e000000>;
+ };
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ Xenon,PPE@0 {
+ device_type = "cpu";
+ linux,boot-cpu;
+ reg = <0>;
+ ibm,ppc-interrupt-server#s = <0 1>;
+ timebase-frequency = <0x2FAF080>; // 50 MHz
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <0x80>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <0x80>;
+
+ /* this must be configured with regard to the HID6:LB value */
+ ibm,segment-page-sizes = <
+ 0xC 0 1 0xc 0 // 4k page
+ 0x10 0x100 1 0x10 00 // 64k pages
+ 0x18 0x110 1 0x18 01 // 16M pages
+ >;
+ };
+ Xenon,PPE@1 {
+ device_type = "cpu";
+ reg = <2>;
+ ibm,ppc-interrupt-server#s = <2 3>;
+ timebase-frequency = <0x2FAF080>;
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <0x80>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <0x80>;
+ };
+ Xenon,PPE@2 {
+ device_type = "cpu";
+ reg = <4>;
+ ibm,ppc-interrupt-server#s = <4 5>;
+ timebase-frequency = <0x2FAF080>;
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <0x80>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <0x80>;
+ };
+ };
+
+ pci {
+ compatible = "xenon";
+ device_type = "pci";
+ #address-cells = <3>; // phy up, mid, low
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <0x40000>;
+ // interrupts = <18 2>;
+ interrupt-map-mask = <0xf900 0 0 0>; // type, lower, upper, irq
+
+ interrupt-map = <
+ 0x0000 0 0 0 0x40000 0x40 // XMA
+ 0x0800 0 0 0 0x40000 0x24 // SATA cdrom
+ 0x1000 0 0 0 0x40000 0x20 // SATA disk
+ 0x2000 0 0 0 0x40000 0x2c // USB OHCI #1
+ 0x2100 0 0 0 0x40000 0x30 // USB EHCI #1
+ 0x2800 0 0 0 0x40000 0x34 // USB OHCI #2
+ 0x2900 0 0 0 0x40000 0x38 // USB EHCI #2
+ 0x3800 0 0 0 0x40000 0x4c // Enet
+ 0x4000 0 0 0 0x40000 0x18 // Flash
+ 0x4800 0 0 0 0x40000 0x44 // audio out
+ 0x5000 0 0 0 0x40000 0x14 // SMM, GPIO, ...
+ 0x7800 0 0 0 0x40000 0x58 // Xenos
+ >;
+
+ bus-range = <0 0>;
+ ranges = <
+ 0x02000000 0x00000000 0x80000000 0x00000200 0x80000000 0x80000000 // PCI space at 80000000 is mapped to 200 80000000
+ 0x02000000 0x00000000 0x00000000 0x00000000 0x00000000 0x20000000 // RAM is 1:1 mapped
+ >;
+ };
+
+ interrupt-controller {
+ compatible = "xenon";
+ linux,phandle = <0x40000>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ built-in;
+ reg = <0x00000200 0x00050000 0x6000>;
+ interrupts = <
+ 0x7c 0x78 0x74 0x70 0x6c 0x68 0x64 0x60
+ 0x5c 0x58 0x54 0x50 0x4c 0x48 0x44 0x40
+ 0x3c 0x38 0x34 0x30 0x2c 0x28 0x24 0x20
+ 0x1c 0x18 0x14 0x10 0x0c 0x08 0x04
+ >;
+ };
+};
\ No newline at end of file
diff --git a/arch/powerpc/configs/xenon_defconfig b/arch/powerpc/configs/xenon_defconfig
new file mode 100644
index 000000000000..ff1b337e16c3
--- /dev/null
+++ b/arch/powerpc/configs/xenon_defconfig
@@ -0,0 +1,260 @@
+CONFIG_LOCALVERSION="-xenon"
+CONFIG_DEFAULT_HOSTNAME="xenon"
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BPF_SYSCALL=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_PSI=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_CGROUPS=y
+CONFIG_MEMCG=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_RDMA=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_BPF=y
+CONFIG_CGROUP_MISC=y
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+CONFIG_KEXEC=y
+CONFIG_KEXEC_FILE=y
+# CONFIG_CRASH_DUMP is not set
+CONFIG_PPC64=y
+CONFIG_CELL_CPU=y
+CONFIG_ALTIVEC=y
+# CONFIG_PPC_RADIX_MMU is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=6
+CONFIG_NR_IRQS=384
+# CONFIG_PPC_POWERNV is not set
+# CONFIG_PPC_PSERIES is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_HZ_300=y
+CONFIG_PPC64_SUPPORTS_MEMORY_FAILURE=y
+CONFIG_THREAD_SHIFT=15
+CONFIG_SCHED_SMT=y
+CONFIG_PPC_DENORMALISATION=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_ZSWAP=y
+CONFIG_ZSWAP_DEFAULT_ON=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_WIRELESS is not set
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_DEBUG=y
+CONFIG_VGA_ARB_MAX_GPUS=1
+CONFIG_HOTPLUG_PCI=y
+CONFIG_UEVENT_HELPER=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_LOADER_COMPRESS=y
+CONFIG_FW_LOADER_COMPRESS_ZSTD=y
+CONFIG_CONNECTOR=m
+CONFIG_ZRAM=m
+CONFIG_ZRAM_BACKEND_LZ4=y
+CONFIG_ZRAM_BACKEND_LZ4HC=y
+CONFIG_ZRAM_BACKEND_ZSTD=y
+CONFIG_ZRAM_BACKEND_DEFLATE=y
+CONFIG_ZRAM_BACKEND_842=y
+CONFIG_ZRAM_BACKEND_LZO=y
+CONFIG_ZRAM_WRITEBACK=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=0
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_CHR_DEV_SG=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_ATA=y
+CONFIG_SATA_XENON=y
+CONFIG_NETDEVICES=y
+CONFIG_NETCONSOLE=y
+CONFIG_NETCONSOLE_DYNAMIC=y
+CONFIG_SIS190=y
+CONFIG_USB_USBNET=y
+# CONFIG_USB_NET_AX8817X is not set
+# CONFIG_USB_NET_NET1080 is not set
+CONFIG_USB_NET_PLUSB=y
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_WLAN is not set
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=m
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=m
+CONFIG_SERIAL_XENON=y
+CONFIG_SERIAL_XENON_CONSOLE=y
+CONFIG_SERIAL_XENON_UART_POLL=y
+CONFIG_SERIAL_NONSTANDARD=y
+CONFIG_XENON_SMC=y
+CONFIG_XENON_ANA=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C_SIS96X=m
+CONFIG_SENSORS_XENON=y
+CONFIG_DRM=y
+CONFIG_DRM_PANIC=y
+CONFIG_DRM_XENOS=y
+CONFIG_FB=y
+CONFIG_HID_BATTERY_STRENGTH=y
+CONFIG_HIDRAW=y
+CONFIG_HID_A4TECH=m
+CONFIG_HID_CHERRY=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_NINTENDO=m
+CONFIG_NINTENDO_FF=y
+CONFIG_HID_SONY=y
+CONFIG_SONY_FF=y
+CONFIG_HID_WIIMOTE=m
+# CONFIG_I2C_HID is not set
+CONFIG_USB_HIDDEV=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ACM=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_UAS=y
+CONFIG_USBIP_CORE=m
+CONFIG_USBIP_VHCI_HCD=m
+CONFIG_USBIP_HOST=m
+CONFIG_USBIP_DEBUG=y
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_XENON=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_DISK=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_ACTIVITY=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_PANIC=y
+CONFIG_LEDS_TRIGGER_NETDEV=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_XENON=y
+# CONFIG_VIRTIO_MENU is not set
+# CONFIG_VHOST_MENU is not set
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_XFS_FS=m
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_POSIX_ACL=y
+CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_FANOTIFY=y
+CONFIG_AUTOFS_FS=m
+CONFIG_FUSE_FS=m
+CONFIG_OVERLAY_FS=y
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_EXFAT_FS=m
+CONFIG_NTFS_FS=m
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_HUGETLBFS=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU=y
+CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_SWAP=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+CONFIG_CIFS=m
+CONFIG_SMB_SERVER=m
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity"
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_ECHAINIV=m
+CONFIG_CRYPTO_ANSI_CPRNG=m
+# CONFIG_CRYPTO_HW is not set
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_STACKTRACE=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_RCU_TRACE is not set
+# CONFIG_FTRACE is not set
+# CONFIG_STRICT_DEVMEM is not set
+CONFIG_PPC_DISABLE_WERROR=y
+CONFIG_PPC_EARLY_DEBUG=y
+# CONFIG_RUNTIME_TESTING_MENU is not set
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index f2656774aaa9..46152929f582 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -107,6 +107,7 @@ static inline void clean_dcache_range(unsigned long start, unsigned long stop)
* to invalidate the cache so the PPC core doesn't get stale data
* from the CPM (no cache snooping here :-).
*/
+#ifndef CONFIG_PPC_XENON
static inline void invalidate_dcache_range(unsigned long start,
unsigned long stop)
{
@@ -120,6 +121,15 @@ static inline void invalidate_dcache_range(unsigned long start,
dcbi(addr);
mb(); /* sync */
}
+#else
+// the 970FX doesn't have dcbi. Yes, really. See 2.2.1.2:
+// https://marcan.st/transf/970FX_user_manual.v1.7.2008MAR14_pub.pdf
+static inline void invalidate_dcache_range(unsigned long start,
+ unsigned long stop)
+{
+ flush_dcache_range(start, stop);
+}
+#endif
#ifdef CONFIG_44x
static inline void flush_instruction_cache(void)
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 29a529d2ab8b..99fe4472c5d9 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -462,6 +462,10 @@ static inline void cpu_feature_keys_init(void) { }
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_PAUSE_ZERO | CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ | \
CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_DABRX)
+#define CPU_FTRS_XENON (CPU_FTR_LWSYNC | \
+ CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+ CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
+ CPU_FTR_CELL_TB_BUG )
#define CPU_FTRS_PA6T (CPU_FTR_LWSYNC | \
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP | \
CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_DABRX)
@@ -517,6 +521,9 @@ enum {
#endif
#ifdef CONFIG_PPC_E500MC
CPU_FTRS_E500MC | CPU_FTRS_E5500 | CPU_FTRS_E6500 |
+#endif
+#ifdef CONFIG_PPC_XENON
+ CPU_FTRS_XENON |
#endif
0,
};
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 4182d68d9cd1..6f769f987b57 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -135,6 +135,8 @@
#define MMU_FTRS_POWER11 MMU_FTRS_POWER6
#define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
MMU_FTR_CI_LARGE_PAGE
+#define MMU_FTRS_XENON MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
+ MMU_FTR_CI_LARGE_PAGE
#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B
#ifndef __ASSEMBLY__
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index a8681b12864f..a7b4ab55a620 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -48,6 +48,7 @@ void __init udbg_init_usbgecko(void);
void __init udbg_init_memcons(void);
void __init udbg_init_ehv_bc(void);
void __init udbg_init_ps3gelic(void);
+void __init udbg_init_xenon(void);
void __init udbg_init_debug_opal_raw(void);
void __init udbg_init_debug_opal_hvsi(void);
void __init udbg_init_debug_16550(void);
diff --git a/arch/powerpc/kernel/cpu_specs_book3s_64.h b/arch/powerpc/kernel/cpu_specs_book3s_64.h
index 98d4274a1b6b..734e617feef7 100644
--- a/arch/powerpc/kernel/cpu_specs_book3s_64.h
+++ b/arch/powerpc/kernel/cpu_specs_book3s_64.h
@@ -499,6 +499,17 @@ static struct cpu_spec cpu_specs[] __initdata = {
.pmc_type = PPC_PMC_IBM,
.platform = "ppc-cell-be",
},
+ { /* Xenon */
+ .pvr_mask = 0xffff0000,
+ .pvr_value = 0x00710000,
+ .cpu_name = "Xenon",
+ .cpu_features = CPU_FTRS_XENON,
+ .cpu_user_features = COMMON_USER_PPC64 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_SMT,
+ .mmu_features = MMU_FTRS_XENON,
+ .icache_bsize = 128,
+ .dcache_bsize = 128,
+ .platform = "xenon",
+ },
{ /* PA Semi PA6T */
.pvr_mask = 0x7fff0000,
.pvr_value = 0x00900000,
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index a997c7f43dc0..7303ae36aaa2 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -74,7 +74,7 @@ _GLOBAL(rmci_off)
blr
#endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
-#ifdef CONFIG_PPC_PMAC
+#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_XENON)
/*
* Do an IO access in real mode
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 9ed9dde7d231..258ecb60ff37 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -352,6 +352,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
intserv = of_get_flat_dt_prop(node, "reg", &len);
nthreads = len / sizeof(int);
+ DBG("%s with %d threads \"%s\" v%d", type, nthreads, uname, fdt_version(initial_boot_params));
/*
* Now see if any of these threads match our boot cpu.
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 862b22b2b616..abb30448cf7b 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -58,6 +58,8 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_raw();
#elif defined(CONFIG_PPC_EARLY_DEBUG_OPAL_HVSI)
udbg_init_debug_opal_hvsi();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_XENON)
+ udbg_init_xenon();
#elif defined(CONFIG_PPC_EARLY_DEBUG_16550)
udbg_init_debug_16550();
#endif
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index fea3766eac0f..c46e134cb188 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -20,6 +20,7 @@ source "arch/powerpc/platforms/44x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/xenon/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 7b527d18aa5e..a75fe6bd417b 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -575,8 +575,8 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
- depends on 44x || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ depends on 4xx || PPC_8xx || PPC_MPC512x || \
+ GAMECUBE_COMMON || AMIGAONE || PPC_XENON
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 3cee4a842736..b75d44e1c7ec 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_PPC_PSERIES) += pseries/
obj-$(CONFIG_PPC_PASEMI) += pasemi/
obj-$(CONFIG_PPC_CELL) += cell/
obj-$(CONFIG_PPC_PS3) += ps3/
+obj-$(CONFIG_PPC_XENON) += xenon/
obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
diff --git a/arch/powerpc/platforms/xenon/Kconfig b/arch/powerpc/platforms/xenon/Kconfig
new file mode 100644
index 000000000000..cc67e77c2329
--- /dev/null
+++ b/arch/powerpc/platforms/xenon/Kconfig
@@ -0,0 +1,17 @@
+config PPC_XENON
+ bool "Xenon"
+ depends on PPC64
+ select HAVE_PCI
+ select PPC_HASH_MMU_NATIVE
+ default y
+ help
+ This option enables support for the Xbox 360 game console
+ without a hypervisor.
+
+config XENON_UDBG
+ bool "Xenon Early Console"
+ depends on PPC_XENON
+ select FONT_SUPPORT
+ help
+ This option enables early debugging over ethernet for the
+ Xenon platform.
diff --git a/arch/powerpc/platforms/xenon/Makefile b/arch/powerpc/platforms/xenon/Makefile
new file mode 100644
index 000000000000..a67d575f856e
--- /dev/null
+++ b/arch/powerpc/platforms/xenon/Makefile
@@ -0,0 +1,4 @@
+obj-y += setup.o interrupt.o pci.o time.o hardware.o
+
+obj-$(CONFIG_SMP) += smp.o
+obj-$(CONFIG_XENON_UDBG) += xe_udbg.o
\ No newline at end of file
diff --git a/arch/powerpc/platforms/xenon/hardware.c b/arch/powerpc/platforms/xenon/hardware.c
new file mode 100644
index 000000000000..a46595ce96b4
--- /dev/null
+++ b/arch/powerpc/platforms/xenon/hardware.c
@@ -0,0 +1,36 @@
+/*
+ * Xenon hardware related routines.
+ *
+ * Copyright (C) 2010 Herbert Poetzl
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/err.h>
+
+static int __init xenon_hwmon_init(void)
+{
+ struct platform_device *pdev;
+
+ pdev = platform_device_register_simple("xenon-hwmon", -1, NULL, 0);
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ return 0;
+}
+
+module_init(xenon_hwmon_init);
diff --git a/arch/powerpc/platforms/xenon/interrupt.c b/arch/powerpc/platforms/xenon/interrupt.c
new file mode 100644
index 000000000000..29a13238f8af
--- /dev/null
+++ b/arch/powerpc/platforms/xenon/interrupt.c
@@ -0,0 +1,376 @@
+/*
+ * Xenon interrupt controller,
+ *
+ * Maintained by: Felix Domke <tmbinc@elitedvb.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License v2
+ * as published by the Free Software Foundation.
+ */
+
+#include <linux/cpumask.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqnr.h>
+#include <linux/module.h>
+#include <linux/percpu.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/irqdesc.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+#ifdef CONFIG_SMP
+#include <linux/smp.h>
+#endif
+
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/prom.h>
+#include <asm/ptrace.h>
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "interrupt.h"
+
+#define NO_IRQ (0)
+
+#define DEBUG
+#if defined(DEBUG)
+#define DBG udbg_printf
+#else
+#define DBG pr_debug
+#endif
+
+static void *iic_base, // 00050000
+ *bridge_base, // ea000000
+ *biu, // e1000000
+ *graphics; // ec800000
+static struct irq_domain *host;
+
+#define XENON_NR_IRQS 128
+
+#define PRIO_IPI_4 0x08
+#define PRIO_IPI_3 0x10
+#define PRIO_SMM 0x14
+#define PRIO_SFCX 0x18
+#define PRIO_SATA_HDD 0x20
+#define PRIO_SATA_CDROM 0x24
+#define PRIO_OHCI_0 0x2C
+#define PRIO_EHCI_0 0x30
+#define PRIO_OHCI_1 0x34
+#define PRIO_EHCI_1 0x38
+#define PRIO_XMA 0x40
+#define PRIO_AUDIO 0x44
+#define PRIO_ENET 0x4C
+#define PRIO_XPS 0x54
+#define PRIO_GRAPHICS 0x58
+#define PRIO_PROFILER 0x60
+#define PRIO_BIU 0x64
+#define PRIO_IOC 0x68
+#define PRIO_FSB 0x6C
+#define PRIO_IPI_2 0x70
+#define PRIO_CLOCK 0x74
+#define PRIO_IPI_1 0x78
+#define PRIO_NONE 0x7C
+
+/*
+ * Important interrupt registers (per CPU):
+ *
+ * 0x00: CPU_WHOAMI
+ * 0x08: CPU_CURRENT_TASK_PRI: only receive interrupts higher than this
+ * 0x10: CPU_IPI_DISPATCH_0
+ * 0x18: unused(?)
+ * 0x20: ? (read changes)
+ * 0x28: ? (read changes)
+ * 0x30: ? (read changes)
+ * 0x38: same value as 0x20(?) (read changes)
+ * 0x40: unused(?)
+ * 0x48: unused(?)
+ * 0x50: ACK
+ * 0x58: ACK + set CPU_CURRENT_TASK_PRI
+ * 0x60: EOI
+ * 0x68: EOI + set CPU_CURRENT_TASK_PRI
+ * 0x70: interrupt MCACK? mask? max interrupt? CPU dies when writing stuff that isn't 0x7C
+ * 0xF0: ?
+ */
+
+/* CPU IRQ -> bridge (PCI) IRQ */
+static const int8_t xenon_pci_irq_map[] = {
+ /* 0x00 */ -1,
+ /* 0x04 */ -1,
+ /* PRIO_IPI_4 */ -1,
+ /* 0x0C */ -1,
+ /* PRIO_IPI_3 */ -1,
+ /* PRIO_SMM */ 3,
+ /* PRIO_SFCX */ 13,
+ /* 0x1C */ -1,
+ /* PRIO_SATA_HDD */ 2,
+ /* PRIO_SATA_CDROM */ 1,
+ /* 0x28 */ -1,
+ /* PRIO_OHCI_0 */ 4,
+ /* PRIO_EHCI_0 */ 5,
+ /* PRIO_OHCI_1 */ 6,
+ /* PRIO_EHCI_1 */ 7,
+ /* 0x3C */ -1,
+ /* PRIO_XMA */ 11,
+ /* PRIO_AUDIO */ 12,
+ /* 0x48 */ -1,
+ /* PRIO_ENET */ 10,
+ /* 0x50 */ -1,
+ /* PRIO_XPS */ -1,
+ /* PRIO_GRAPHICS */ -1,
+ /* 0x5C */ -1,
+ /* PRIO_PROFILER */ -1,
+ /* PRIO_BIU */ -1,
+ /* PRIO_IOC */ -1,
+ /* PRIO_FSB */ -1,
+ /* PRIO_IPI_2 */ -1,
+ /* PRIO_CLOCK */ 0,
+ /* PRIO_IPI_1 */ -1,
+ /* PRIO_NONE */ -1,
+};
+
+static void disconnect_pci_irq(int prio)
+{
+ int i;
+
+ printk(KERN_INFO "xenon IIC: disconnect irq 0x%.2X\n", prio);
+
+ i = xenon_pci_irq_map[prio >> 2];
+ if (i != -1) {
+ writel(0, bridge_base + 0x10 + i * 4);
+ }
+}
+
+/* connects a PCI IRQ to a CPU */
+static void connect_pci_irq(int prio, int target_cpu)
+{
+ int8_t i;
+
+ printk(KERN_INFO "xenon IIC: connect irq 0x%.2X\n", prio);
+
+ i = xenon_pci_irq_map[prio >> 2];
+ if (i != -1) {
+ /*
+ * Bits:
+ * 0x00800000 = enable(?)
+ * 0x00200000 = latched
+ * 0x00003F00 = cpu target
+ * 0x00000080 = level sensitive
+ * 0x0000007F = CPU IRQ
+ */
+ uint32_t bits = 0x00800080;
+ bits |= ((1 << target_cpu) & 0xFF) << 8;
+ bits |= (prio >> 2) & 0x3F;
+
+ writel(bits, bridge_base + 0x10 + i * 4);
+ }
+}
+
+static void iic_mask(struct irq_data *data)
+{
+ disconnect_pci_irq(data->hwirq);
+}
+
+static void iic_unmask(struct irq_data *data)
+{
+ connect_pci_irq(data->hwirq, 0);
+}
+
+static void xenon_ipi_send_mask(struct irq_data *data,
+ const struct cpumask *dest)
+{
+ int cpu = hard_smp_processor_id();
+ out_be64(iic_base + cpu * 0x1000 + 0x10,
+ ((cpumask_bits(dest)[0] << 16) & 0x3F) | (data->hwirq & 0x7C));
+}
+
+static struct irq_chip xenon_pic = {
+ .name = " XENON-PIC ",
+ .irq_mask = iic_mask,
+ .irq_unmask = iic_unmask,
+ .ipi_send_mask = xenon_ipi_send_mask,
+ .flags = 0,
+};
+
+void xenon_init_irq_on_cpu(int cpu)
+{
+ printk(KERN_INFO "xenon IIC: init on cpu %i\n", cpu);
+
+ /* init that cpu's interrupt controller */
+ out_be64(iic_base + cpu * 0x1000 + 0x70, 0x7C);
+ out_be64(iic_base + cpu * 0x1000 + 0x08, 0); /* Set priority to 0 */
+ out_be64(iic_base + cpu * 0x1000, 1 << cpu); /* "who am i" */
+
+ /* read in and ack all outstanding interrupts */
+ while (in_be64(iic_base + cpu * 0x1000 + 0x50) != PRIO_NONE);
+ out_be64(iic_base + cpu * 0x1000 + 0x68, 0); /* EOI and set priority to 0 */
+}
+
+/* Get an IRQ number from the pending state register of the IIC */
+static unsigned int iic_get_irq(void)
+{
+ int cpu = hard_smp_processor_id();
+ void *my_iic_base;
+ int index;
+
+ my_iic_base = iic_base + cpu * 0x1000;
+
+ /* read destructive pending interrupt */
+ index = in_be64(my_iic_base + 0x50) & 0x7C;
+ out_be64(my_iic_base + 0x60, 0x0); /* EOI this interrupt. */
+
+ /* HACK: we will handle some (otherwise unhandled) interrupts here
+ to prevent them flooding. */
+ switch (index) {
+ case PRIO_GRAPHICS:
+ writel(0, graphics + 0xed0); // RBBM_INT_CNTL
+ writel(0, graphics + 0x6540); // R500_DxMODE_INT_MASK
+ break;
+ case PRIO_IOC:
+ writel(0, biu + 0x4002c);
+ break;
+ case PRIO_CLOCK:
+ writel(0, bridge_base + 0x106C);
+ break;
+ default:
+ break;
+ }
+
+ /* No interrupt. This really shouldn't happen. */
+ if (index == PRIO_NONE) {
+ return NO_IRQ;
+ }
+
+ return irq_find_mapping(host, index);
+}
+
+static int xenon_irq_host_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ irq_set_chip_and_handler(virq, &xenon_pic, handle_percpu_irq);
+ return 0;
+}
+
+static int xenon_irq_host_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ return h->host_data != NULL && node == h->host_data;
+}
+
+static const struct irq_domain_ops xenon_irq_host_ops = {
+ .map = xenon_irq_host_map,
+ .match = xenon_irq_host_match,
+};
+
+void __init xenon_iic_init_IRQ(void)
+{
+ int i;
+ struct device_node *dn;
+ struct resource res;
+
+ printk(KERN_DEBUG "xenon IIC: init\n");
+ /* search for our interrupt controller inside the device tree */
+ for (dn = NULL;
+ (dn = of_find_node_by_name(dn, "interrupt-controller")) != NULL;) {
+ if (!of_device_is_compatible(dn, "xenon"))
+ continue;
+
+ if (of_address_to_resource(dn, 0, &res))
+ {