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Updated for first three weeks SP26
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_staffers/Aidan.md

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photo: aidan_rickert.webp
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---
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I'm Aidan, a Junior in EECS. My experience in PCB design comes from being Avionics Leads of Space Technologies and Rocketry (STAR) and two internships at Astranis. This is my first time teaching APE and I exciting to go on this journey with you!
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I'm Aidan, a Junior in EECS. My experience in PCB design comes from being Avionics Leads of Space Technologies and Rocketry (STAR) and two internships at Astranis. This is my second time teaching APE and I'm excited to go on this journey with you!

course-info.md

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APE introduces advanced printed circuit board (PCB) design and layout, with a focus on more complex considerations and more nuanced experience with standard tools than the introductory Hands-On PCB Engineering (HOPE) course. It is intended for students with previous PCB design experience (preferably HOPE) and some basic experience with upper division-level circuit design. Students will utilize Altium Designer alongside supporting software and plugins to aid in design and verification of PCBs. Students interested in developing PCBs for class projects, research, or engineering student teams will benefit from this course.
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You can find the syllabus [HERE](https://docs.google.com/document/d/1CdxfcXsvoL-aMWkG8YlPuyAOb3MjzHpzyLjSFaty43k/edit?usp=sharing)
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You can find the syllabus [HERE](https://docs.google.com/document/d/1OmuT0KNtPcCBOl_wxE3xbWQctL8guNKrCQKkM4Mp_VY/edit?usp=sharing)
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### Enrolling in APE
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Students who are interested in signing up for APE in Fall 2025 should fill out [THIS](https://berkie.ee/ape-fa25-apply?ref=ieee.berkeley.edu) enrollment form.
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Students who are interested in signing up for APE in Spring 2026 should email [ape@ieee.berkeley.edu](ape@ieee.berkeley.edu)
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Please email us if you are a concurrent enrollment student- we prioritize matriculated UC Berkeley students. Space permitting, however, concurrent enrollment students are welcome to take APE.
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Please also email us if you are a concurrent enrollment student- we prioritize matriculated UC Berkeley students. Space permitting, however, concurrent enrollment students are welcome to take APE.
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The first day of class will be 9/2.
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The first day of class will be 1/27.
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We offer APE as an in-person class. We have a single section on Tuesday in Cory 125.
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We offer APE as an in-person class. We have a single section on Tuesday in Cory 125 from 8-10 PM.
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### Prerequisites
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At least one upper division course with a circuit design element, such as EE105, EE108, EE113A/B, EE140 (240A), EE142 (242A), EECS151 (251A), or EE194/290: Tapeout/Bringup, will provide expected knowledge. HOPE or previous PCB design experience is also highly recommended. If you have completed alternative coursework or have experience please let us know in the application form! Those unsure are welcome to email us (the class is not limited to EECS students!).
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Required: HOPE or previous PCB design experience at a similar level. If you have completed alternative coursework or have experience please let us know in the application form! Those unsure are welcome to email us (the class is not limited to EECS students!).
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Recommended: at least one upper division course with a circuit design element, such as EE105, EE108, EE113A/B, EE140 (240A), EE142 (242A), EECS151 (251A), or EE194/290: Tapeout/Bringup.
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### Office Hours

index.md

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name: Berkeley IEEE APE
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# Advanced PCB Engineering (APE) [Fall 2025]
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# Advanced PCB Engineering (APE) [Spring 2026]
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<!-- {:.no_toc} -->
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{%- if site.under_construction -%}
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{%- endif -%}
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**Lecture:** 8-10PM Tu, Cory 125\
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[Enrollment](http://berkie.ee/ape-fa25-apply)
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<table id="timeline" style="line-height: normal;">
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<tbody><tr>
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</tr><!--kg-card-end: html--><!--kg-card-begin: html--><tr>
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<td class="week">
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<strong>1</strong> <br>
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9/2
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1/27
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</td>
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<td style="text-align: left;">
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<strong>Intro to Altium</strong><br><br>
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Intro to the class, Altium, and key tools and plugins required for the class content.
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Intro to the class, logistics, and overview of Altium.
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</td>
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<td>
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<ul>
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<li><a href="https://docs.google.com/presentation/d/1Er_3XXvGT4f94rDUYZfg1uGY670_WDn37x3HIVv7Zvs/edit?usp=sharing&amp;ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer">Lecture 1 Slides</a>
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<li><a href="https://docs.google.com/presentation/d/1Er_3XXvGT4f94rDUYZfg1uGY670_WDn37x3HIVv7Zvs/edit?usp=sharing" target="_blank" rel="noopener noreferrer">Lecture 1: Introduction</a>
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</li>
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</ul>
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<td class="lab">
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<a href="https://www.altium.com/education/students?ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer"> Altium Access Instructions</a><br><br>
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<a href="https://docs.google.com/presentation/d/1p2-E-jdT5tIeXX5c7qOSWVSRqMDzmIiCIHyKMrU7wZs/edit?usp=sharing%2F&amp;ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer">Introduction to Altium</a><br><br>
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<a href="https://docs.google.com/presentation/d/1p2-E-jdT5tIeXX5c7qOSWVSRqMDzmIiCIHyKMrU7wZs/edit?usp=sharing%2F&amp;ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer">Lab 1: Intro to Altium Schematics</a><br><br>
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<a href="https://docs.google.com/document/d/1n7WUi9RVcNrMyvJe42HEMZrT90SFxaEiMp7O50SOR0A/edit?usp=sharing" target="_blank" rel="noopener noreferrer">Keybind Cheatsheet</a>
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<td>
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<td>
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<a href="http://berkie.ee/ape-fa25-project-spec" target="_blank" rel="noopener noreferrer">Project Logistics</a>
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<br>
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<br>
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<a href="https://docs.google.com/spreadsheets/d/1ZZAnW61lbqi8A5PHymeQs3MktsaBvQEssZroThjktFo/edit?usp=sharing&amp;ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer"> BOM Template</a>
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</tr> <!--kg-card-end: html--><!--kg-card-begin: html--><tr>
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<td class="week">
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<strong>2</strong> <br>
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<td style="text-align: left;">
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<strong>Part Selection, Intro to Advanced Schematics - Filters and Basic Analog Design
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<strong>PCB Parasitics and Noise
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</strong><br><br>
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Covering considerations for part selection beyond the base electrical rules. Exploration of analog design fundamentals within schematic creation.
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PCB parasitics, trace and via sizing, EMI, ground planes, crosstalk, reflections, switching noise
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<ul>
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<a href="https://docs.google.com/presentation/d/1GYEfiXVO_arjcQqJh56IxN-oNgZTE3PVS1cfQrrAd6M/edit?usp=sharing&amp;ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer">Lecture 2 Slides</a> </li>
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<a href="https://docs.google.com/presentation/d/1LNV7R2GZhx0jwOsVoQm0Pc4N4TguUehJyQuLJv14D3Q/edit?usp=sharing" target="_blank" rel="noopener noreferrer">Lecture 2: Parasitics and Noise</a> </li>
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Continue Introduction to Altium
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Lab 2: Introduction to Altium Layout
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<strong>Advanced Schematics, Digital Design, Data Buses and Protocols
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<strong>Intro to Analog Design
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Exploring information is encoded, translated, and transported at high speeds and the key issues of high-speed transmissions.
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Passive and active filters, selecting op-amps based on their characterisitcs, voltage references, charge pumps
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<a href="https://docs.google.com/presentation/d/16cDy7mopXpgBnwNMkBruPGN22-EBcpUTiJRQf0NGYwo/edit?usp=sharing&amp;ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer">Lecture 3 Slides</a>
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<a href="https://docs.google.com/presentation/d/1GYEfiXVO_arjcQqJh56IxN-oNgZTE3PVS1cfQrrAd6M/edit?usp=sharing" target="_blank" rel="noopener noreferrer">Lecture 3: Intro to Analog Design</a>
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<a href="https://docs.google.com/presentation/d/1e-vf_CMKmzh4Jmfp3zO7D2jMCQSCjbxdgUfLyfq2gag/edit?usp=sharing&amp;ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer">Digital Communication and Signal Integrity</a>
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Introduction to Altium
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Lab 3: Simulating Analog Filters
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<a href="http://berkie.ee/ape-fa25-proj-group" target="_blank" rel="noopener noreferrer">Project Groups Due</a> <br>(2 people minimum)<br>
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<strong>Advanced Schematics, High Power Circuit Design
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<strong>Everything on this row and below is a lie and not updated!
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Understanding key principles to develop systems designed to accomodate high power draws.
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<ul>
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<li><a href="https://docs.google.com/presentation/d/12ekAYLrE_DmCJJt6cWYQLPsWxLjAHLNMdJkkK65xbVg/edit?usp=sharing&amp;ref=ieee.berkeley.edu" target="_blank" rel="noopener noreferrer">Lecture 4 Slides</a></li>
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<a href="https://docs.google.com/presentation/d/16KEnmBfNRSl6A1tmkhhHGiFTQUrmhDXW08lxEhzbhAE/edit?usp=sharing" target="_blank" rel="noopener noreferrer">Power Regulator Circuitry Design and Simulation</a>

resources.md

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## Project Links
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[Project Spec](http://berkie.ee/ape-fa25-project-spec)
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[Project Group Form](http://berkie.ee/ape-fa25-proj-group)
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[Project Proposal Form](http://berkie.ee/ape-fa25-proj-proposal)
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To be added!
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## Course Links
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[Lab Checkoff Form](http://berkie.ee/ape-fa25-lab-checkoff)
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[Extension Request Form](http://berkie.ee/ape-fa25-extension-req)
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[APE bCourses](https://bcourses.berkeley.edu/courses/1549159)
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[Lab Checkoff Form](https://forms.gle/8N2gxbHQf6kTh3Lx6)
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## Other Forms
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[Anonymous Feedback Form](http://berkie.ee/ape-fa25-anon-feedback)
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[Anonymous Feedback Form](https://forms.gle/FdCyjj5jTi1gGFvB7)
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[APE Staff Interest Form](http://berkie.ee/ape-fa25-staff-interest)
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[APE Staff Interest Form](https://forms.gle/Weyp7u1w8fkHvJXJ7)
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