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tomeichlersmithtomeichlersmith
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add common EcalSMM class for shared logic
following DRY to see if that helps avoid this DLL_RESET loop we are falling into on the Bittware
1 parent 814d838 commit 2f668d1

7 files changed

Lines changed: 193 additions & 204 deletions

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‎CMakeLists.txt‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,8 @@ set(pflib_src
136136
src/pflib/zcu/HcalBackplane.cxx
137137
src/pflib/zcu/EcalSMM.cxx
138138
src/pflib/zcu/HGCROCBoardFiberless.cxx
139-
src/pflib/Ecal.cxx
139+
src/pflib/EcalModule.cxx
140+
src/pflib/EcalSingleModuleMotherboard.cxx
140141
src/pflib/Bias.cxx
141142
)
142143

include/pflib/Ecal.h renamed to include/pflib/EcalModule.h

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -89,16 +89,4 @@ class EcalModule {
8989
static const std::vector<std::pair<int, int>> roc_to_erx_map_;
9090
};
9191

92-
class EcalMotherboard {
93-
public:
94-
EcalMotherboard() {}
95-
/// create a module
96-
void createModule(int imodule, lpGBT& lpGBT, int i2cbus);
97-
/// get a module
98-
EcalModule& module(int imodule);
99-
100-
private:
101-
std::vector<std::shared_ptr<EcalModule>> modules_;
102-
};
103-
10492
} // namespace pflib

‎include/pflib/EcalSingleModuleMotherboard.h‎

Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,55 @@
1+
#pragma once
2+
#ifndef PFLIB_ECALSINGLEMODULEMOTHERBOARD_H
3+
#define PFLIB_ECALSINGLEMODULEMOTHERBOARD_H
4+
5+
#include "pflib/EcalModule.h"
6+
#include "pflib/Target.h"
7+
8+
namespace pflib {
9+
10+
/**
11+
* a target for Ecal motherboards holding a single module
12+
*
13+
* common accessors and initialization procedures between
14+
* the ZCU and Bittware targets
15+
* Since there is just one module, the ROC/ECON
16+
* accessors and resets are just forwarding calls to our
17+
* held instance of an EcalModule.
18+
*/
19+
class EcalSingleModuleMotherboard : public Target {
20+
public:
21+
virtual ~EcalSingleModuleMotherboard() = default;
22+
/**
23+
* common initialization given the DAQ/TRG lpGBTs and
24+
* a mask labeling which ROCs on the module are active
25+
*
26+
* This should be called after the optical links are
27+
* properly setup and used to create access to the lpGBTs.
28+
*/
29+
void init(lpGBT& daq_lpgbt, lpGBT& trg_lpgbt, int module_i2c_bus, int roc_mask);
30+
virtual const std::vector<std::pair<int,int>>& getRocErxMapping() override;
31+
virtual int nrocs() override;
32+
virtual int necons() override;
33+
virtual bool have_roc(int iroc) const override;
34+
virtual bool have_econ(int iecon) const override;
35+
virtual std::vector<int> roc_ids() const override;
36+
virtual std::vector<int> econ_ids() const override;
37+
virtual ROC& roc(int which) override;
38+
virtual ECON& econ(int which) override;
39+
virtual void softResetROC(int which) override;
40+
virtual void softResetECON(int which = -1) override;
41+
virtual void hardResetROCs() override;
42+
virtual void hardResetECONs() override;
43+
virtual void setup_run(int irun, Target::DaqFormat format, int contrib_id) override;
44+
protected:
45+
/// handle to the hexa-module that we are connected to
46+
std::shared_ptr<EcalModule> the_module_;
47+
/// the format we are using for DAQ
48+
Target::DaqFormat format_;
49+
/// the contributor ID for DAQ
50+
int contrib_id_;
51+
};
52+
53+
}
54+
55+
#endif

src/pflib/Ecal.cxx renamed to src/pflib/EcalModule.cxx

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
#include "pflib/Ecal.h"
1+
#include "pflib/EcalModule.h"
22

33
#include "pflib/lpgbt/I2C.h"
44
#include "pflib/utility/string_format.h"

‎src/pflib/EcalSingleModuleMotherboard.cxx‎

Lines changed: 128 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,128 @@
1+
#include "pflib/EcalSingleModuleMotherboard.h"
2+
3+
#include "pflib/lpgbt/lpGBT_standard_configs.h"
4+
5+
namespace pflib {
6+
7+
void EcalSingleModuleMotherboard::init(
8+
lpGBT& daq_lpgbt, lpGBT& trg_lpgbt, int module_i2c_bus, int roc_mask
9+
) {
10+
// Setup DAQ lpGBT
11+
try {
12+
int daq_pusm = daq_lpgbt.status();
13+
pflib::lpgbt::standard_config::setup_ecal_daq_gpio(daq_lpgbt);
14+
15+
if (daq_pusm == 19) {
16+
pflib_log(debug) << "DAQ lpGBT is PUSM READY (19)";
17+
} else {
18+
pflib_log(debug)
19+
<< "DAQ lpGBT is not ready, attempting standard config";
20+
try {
21+
pflib::lpgbt::standard_config::setup_ecal(
22+
daq_lpgbt, pflib::lpgbt::standard_config::ECAL_lpGBT_Config::
23+
DAQ_SingleModuleMotherboard);
24+
} catch (const pflib::Exception& e) {
25+
pflib_log(warn) << "Failure to apply standard config [" << e.name()
26+
<< "]: " << e.message();
27+
}
28+
}
29+
} catch (const pflib::Exception& e) {
30+
pflib_log(debug) << "unable to I2C transact with lpGBT, advising user to "
31+
"check Optical links";
32+
pflib_log(warn) << "Failure to check DAQ lpGBT status [" << e.name()
33+
<< "]: " << e.message();
34+
pflib_log(warn) << "Go into OPTO and make sure the link is READY"
35+
<< " and then re-open pftool.";
36+
}
37+
38+
// Setup TRG lpGBT
39+
try {
40+
int trg_pusm = trg_lpgbt.status();
41+
if (trg_pusm == 19) {
42+
pflib_log(debug) << "TRG lpGBT is PUSM READY (19)";
43+
} else {
44+
pflib_log(debug)
45+
<< "TRG lpGBT is not ready, attempting standard config";
46+
try {
47+
// was the DAQ_SMM setup config on the ZCU
48+
pflib::lpgbt::standard_config::setup_ecal(
49+
trg_lpgbt, pflib::lpgbt::standard_config::ECAL_lpGBT_Config::
50+
TRIG_SingleModuleMotherboard);
51+
} catch (const pflib::Exception& e) {
52+
pflib_log(info) << "Not Critical Problem setting up TRIGGER lpGBT.";
53+
pflib_log(info) << "Failure to apply standard config [" << e.name()
54+
<< "]: " << e.message();
55+
}
56+
}
57+
} catch (const pflib::Exception& e) {
58+
pflib_log(info) << "(Not Critical) Failure to check TRG lpGBT status ["
59+
<< e.name() << "]: " << e.message();
60+
}
61+
62+
the_module_ = std::make_shared<EcalModule>(daq_lpgbt, module_i2c_bus, 0, roc_mask);
63+
}
64+
65+
const std::vector<std::pair<int,int>>& EcalSingleModuleMotherboard::getRocErxMapping() {
66+
return EcalModule::getRocErxMapping();
67+
}
68+
69+
int EcalSingleModuleMotherboard::nrocs() {
70+
return the_module_->nrocs();
71+
}
72+
73+
int EcalSingleModuleMotherboard::necons() {
74+
return the_module_->necons();
75+
}
76+
77+
bool EcalSingleModuleMotherboard::have_roc(int iroc) const {
78+
return the_module_->have_roc(iroc);
79+
}
80+
81+
bool EcalSingleModuleMotherboard::have_econ(int iecon) const {
82+
return the_module_->have_econ(iecon);
83+
}
84+
85+
std::vector<int> EcalSingleModuleMotherboard::roc_ids() const {
86+
return the_module_->roc_ids();
87+
}
88+
89+
std::vector<int> EcalSingleModuleMotherboard::econ_ids() const {
90+
return the_module_->econ_ids();
91+
}
92+
93+
ROC& EcalSingleModuleMotherboard::roc(int which) {
94+
return the_module_->roc(which);
95+
}
96+
97+
ECON& EcalSingleModuleMotherboard::econ(int which) {
98+
return the_module_->econ(which);
99+
}
100+
101+
void EcalSingleModuleMotherboard::softResetROC(int which) {
102+
/// the soft reset is applied to all ROCs on the board
103+
return the_module_->softResetROC();
104+
}
105+
106+
void EcalSingleModuleMotherboard::softResetECON(int which) {
107+
/// the soft reset is applied to all ECONs on the board
108+
return the_module_->softResetECON();
109+
}
110+
111+
void EcalSingleModuleMotherboard::hardResetROCs() {
112+
return the_module_->hardResetROCs();
113+
}
114+
115+
void EcalSingleModuleMotherboard::hardResetECONs() {
116+
return the_module_->hardResetECONs();
117+
}
118+
119+
void EcalSingleModuleMotherboard::setup_run(int irun, Target::DaqFormat format, int contrib_id) {
120+
format_ = format;
121+
contrib_id_ = contrib_id;
122+
123+
// this reset and clear_run were not present in the EcalSMMBittware
124+
daq().reset();
125+
fc().clear_run();
126+
}
127+
128+
}

‎src/pflib/bittware/EcalSMM.cxx‎

Lines changed: 3 additions & 94 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,8 @@
1-
#include "pflib/Ecal.h"
2-
#include "pflib/Target.h"
1+
#include "pflib/EcalSingleModuleMotherboard.h"
32
#include "pflib/bittware/bittware_FastControl.h"
43
#include "pflib/bittware/bittware_daq.h"
54
#include "pflib/bittware/bittware_elinks.h"
65
#include "pflib/bittware/bittware_optolink.h"
7-
#include "pflib/lpgbt/I2C.h"
8-
#include "pflib/lpgbt/lpGBT_standard_configs.h"
96
#include "pflib/utility/string_format.h"
107

118
namespace pflib {
@@ -14,9 +11,8 @@ static constexpr int ADDR_ECAL_SMM_DAQ = 0x78 | 0x04;
1411
static constexpr int ADDR_ECAL_SMM_TRIG = 0x78;
1512
static constexpr int I2C_BUS_M0 = 1;
1613

17-
class EcalSMMTargetBW : public Target {
14+
class EcalSMMTargetBW : public EcalSingleModuleMotherboard {
1815
mutable logging::logger the_log_{logging::get("EcalSMMBW")};
19-
2016
public:
2117
EcalSMMTargetBW(int itarget, uint8_t roc_mask, const char* dev) {
2218
using namespace pflib::bittware;
@@ -31,100 +27,20 @@ class EcalSMMTargetBW : public Target {
3127
trig_lpgbt_ =
3228
std::make_unique<pflib::lpGBT>(opto_["TRG"]->lpgbt_transport());
3329

34-
ecalModule_ = std::make_shared<pflib::EcalModule>(*daq_lpgbt_, I2C_BUS_M0,
35-
0, roc_mask);
30+
init(*daq_lpgbt_, *trig_lpgbt_, I2C_BUS_M0, roc_mask);
3631

3732
elinks_ = std::make_unique<OptoElinksBW>(itarget, dev);
3833
daq_ = std::make_unique<bittware::HcalBackplaneBW_Capture>(dev);
3934

40-
// Setup DAQ lpGBT
41-
try {
42-
int daq_pusm = daq_lpgbt_->status();
43-
pflib::lpgbt::standard_config::setup_ecal_daq_gpio(*daq_lpgbt_);
44-
45-
if (daq_pusm == 19) {
46-
pflib_log(debug) << "DAQ lpGBT is PUSM READY (19)";
47-
} else {
48-
pflib_log(debug)
49-
<< "DAQ lpGBT is not ready, attempting standard config";
50-
try {
51-
pflib::lpgbt::standard_config::setup_ecal(
52-
*daq_lpgbt_, pflib::lpgbt::standard_config::ECAL_lpGBT_Config::
53-
DAQ_SingleModuleMotherboard);
54-
} catch (const pflib::Exception& e) {
55-
pflib_log(warn) << "Failure to apply standard config [" << e.name()
56-
<< "]: " << e.message();
57-
}
58-
}
59-
} catch (const pflib::Exception& e) {
60-
pflib_log(debug) << "unable to I2C transact with lpGBT, advising user to "
61-
"check Optical links";
62-
pflib_log(warn) << "Failure to check DAQ lpGBT status [" << e.name()
63-
<< "]: " << e.message();
64-
pflib_log(warn) << "Go into OPTO and make sure the link is READY"
65-
<< " and then re-open pftool.";
66-
}
67-
68-
// Setup TRG lpGBT
69-
try {
70-
int trg_pusm = trig_lpgbt_->status();
71-
if (trg_pusm == 19) {
72-
pflib_log(debug) << "TRG lpGBT is PUSM READY (19)";
73-
} else {
74-
pflib_log(debug)
75-
<< "TRG lpGBT is not ready, attempting standard config";
76-
try {
77-
pflib::lpgbt::standard_config::setup_ecal(
78-
*trig_lpgbt_, pflib::lpgbt::standard_config::ECAL_lpGBT_Config::
79-
TRIG_SingleModuleMotherboard);
80-
} catch (const pflib::Exception& e) {
81-
pflib_log(info) << "Not Critical Problem setting up TRIGGER lpGBT.";
82-
pflib_log(info) << "Failure to apply standard config [" << e.name()
83-
<< "]: " << e.message();
84-
}
85-
}
86-
} catch (const pflib::Exception& e) {
87-
pflib_log(info) << "(Not Critical) Failure to check TRG lpGBT status ["
88-
<< e.name() << "]: " << e.message();
89-
}
90-
9135
fc_ = std::make_shared<bittware::BWFastControl>(dev);
9236
}
9337

94-
const std::vector<std::pair<int, int>>& getRocErxMapping() override;
95-
virtual int nrocs() { return ecalModule_->nrocs(); }
96-
virtual int necons() { return ecalModule_->necons(); }
97-
virtual bool have_roc(int iroc) const { return ecalModule_->have_roc(iroc); }
98-
virtual bool have_econ(int iecon) const {
99-
return ecalModule_->have_econ(iecon);
100-
}
101-
virtual std::vector<int> roc_ids() const { return ecalModule_->roc_ids(); }
102-
virtual std::vector<int> econ_ids() const { return ecalModule_->econ_ids(); }
103-
104-
virtual ROC& roc(int which) { return ecalModule_->roc(which); }
105-
virtual ECON& econ(int which) { return ecalModule_->econ(which); }
106-
107-
virtual void softResetROC(int which) override { ecalModule_->softResetROC(); }
108-
109-
virtual void softResetECON(int which = -1) override {
110-
ecalModule_->softResetECON();
111-
}
112-
113-
virtual void hardResetROCs() override { ecalModule_->hardResetROCs(); }
114-
115-
virtual void hardResetECONs() override { ecalModule_->hardResetECONs(); }
116-
11738
virtual Elinks& elinks() override { return *elinks_; }
11839

11940
virtual DAQ& daq() override { return *daq_; }
12041

12142
virtual FastControl& fc() override { return *fc_; }
12243

123-
virtual void setup_run(int irun, Target::DaqFormat format, int contrib_id) {
124-
format_ = format;
125-
contrib_id_ = contrib_id;
126-
}
127-
12844
virtual std::vector<uint32_t> read_event() override {
12945
if (format_ == Target::DaqFormat::ECOND_SW_HEADERS) {
13046
return daq().read_event_sw_headers();
@@ -137,22 +53,15 @@ class EcalSMMTargetBW : public Target {
13753
}
13854

13955
private:
140-
std::shared_ptr<EcalModule> ecalModule_;
14156
std::unique_ptr<lpGBT> daq_lpgbt_, trig_lpgbt_;
14257
std::unique_ptr<pflib::bittware::OptoElinksBW> elinks_;
14358
std::unique_ptr<bittware::HcalBackplaneBW_Capture> daq_;
14459
std::shared_ptr<pflib::bittware::BWFastControl> fc_;
145-
Target::DaqFormat format_;
146-
int contrib_id_;
14760
};
14861

14962
Target* makeTargetEcalSMMBittware(int ilink, uint8_t roc_mask,
15063
const char* dev) {
15164
return new EcalSMMTargetBW(ilink, roc_mask, dev);
15265
}
15366

154-
const std::vector<std::pair<int, int>>& EcalSMMTargetBW::getRocErxMapping() {
155-
return EcalModule::getRocErxMapping();
156-
}
157-
15867
} // namespace pflib

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