Skip to content

Commit 70ed28d

Browse files
committed
Clean up build variants.
Neotron OS now only ever gets 4KiB of RAM at 0x2000_0000. It learns about the rest from the BIOS. We always assume the BIOS is 128 KiB. If it is larger, it has to split itself into two parts.
1 parent cd809c3 commit 70ed28d

5 files changed

Lines changed: 29 additions & 40 deletions

File tree

README.md

Lines changed: 10 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -19,49 +19,38 @@ This OS is a work in progress. We intend to support:
1919

2020
## Build instructions
2121

22-
Your board will need an appropriate Neotron BIOS installed, and you need to have OpenOCD running for your particular board. You also need to set the linker
23-
arguments so you link the binary to suit the memory available on your system.
22+
Your board will need an appropriate Neotron BIOS installed, and you need to
23+
have OpenOCD (or other programming tool) running for your particular board.
24+
You may also need to set the linker arguments so you link the binary to suit
25+
the memory available on your system.
2426

25-
### Build Instructions for the Neotron Pico
26-
27-
The Neotron Pico has some special memory requirements - in particular, the
28-
flash lives at `0x1000_0000` and not `0x0000_0000`. There is 1920 KiB of
29-
flash, and 240 KiB of RAM available.
27+
### Build Instructions for the Neotron Pico (and other systems with Flash at `0x1000_0000`)
3028

3129
```
3230
$ git clone https://github.com/neotron-compute/Neotron-OS.git
3331
$ cd Neotron-OS
3432
$ git submodule update --init
35-
$ RUSTFLAGS="-C link-arg=-Tneotron-os-pico.ld" cargo build --release --target=thumbv6m-none-eabi
33+
$ RUSTFLAGS="-C link-arg=-Tneotron-flash-1000.ld" cargo build --release --target=thumbv6m-none-eabi
3634
```
3735

38-
### Build Instructions for 256K RAM systems
39-
40-
Systems which reserve the second 512 KiB of Flash and first 256 KiB of SRAM
41-
for the OS can use this linker script. These systems include the Neotron
42-
340ST.
36+
### Build Instructions for the STM32 (and other systems with Flash at `0x0800_0000`)
4337

4438
```
4539
$ git clone https://github.com/neotron-compute/Neotron-OS.git
4640
$ cd Neotron-OS
4741
$ git submodule update --init
48-
$ RUSTFLAGS="-C link-arg=-Tneotron-os-256k.ld" cargo run --release
42+
$ RUSTFLAGS="-C link-arg=-Tneotron-flash-0800.ld" cargo build --release --target=thumbv6m-none-eabi
4943
```
5044

51-
### Build Instructions for 32K RAM systems
52-
53-
Systems which reserve the second 128 KiB of Flash and first 26 KiB of SRAM for
54-
the OS can use this linker script. These systems include the Neotron 32.
45+
### Build Instructions for other systems (with Flash at `0x0000_0000`)
5546

5647
```
5748
$ git clone https://github.com/neotron-compute/Neotron-OS.git
5849
$ cd Neotron-OS
5950
$ git submodule update --init
60-
$ RUSTFLAGS="-C link-arg=-Tneotron-os-26k.ld" cargo run --release
51+
$ RUSTFLAGS="-C link-arg=-Tneotron-flash-0000.ld" cargo run --release
6152
```
6253

63-
TODO: Think of a better way of setting the memory limits for a particular OS build.
64-
6554
## Changelog
6655

6756
### Unreleased Changes ([Source](https://github.com/neotron-compute/Neotron-OS/tree/master))
Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,13 @@
2121
/* Provides information about the memory layout of the device */
2222
MEMORY
2323
{
24-
/* The OS gets the top 128 KiB of Flash, leaving the first 128 KiB for the BIOS */
24+
/* The first 128 KiB is for the BIOS. We get the rest. */
2525
FLASH (rx) : ORIGIN = 0x00020000, LENGTH = 128K
26-
/* The BIOS gets the top 6 KiB of SRAM (including the Stack), leaving 26 KiB for the OS (at 0x2000_0000 to 0x2000_67FF) */
27-
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 26K
26+
/*
27+
* We get the bottom 4KB of RAM. Anything above that is for applications
28+
* (up to wherever the BIOS tells us we can use.)
29+
*/
30+
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
2831
}
2932

3033
/* # Entry point = what the BIOS calls to start the OS */
Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -21,14 +21,13 @@
2121
/* Provides information about the memory layout of the device */
2222
MEMORY
2323
{
24-
/* The BIOS gets the first 512 KiB of Flash, leaving 512 KiB for the OS */
25-
FLASH (rx) : ORIGIN = 0x08080000, LENGTH = 512K
26-
/* The BIOS gets the top 64 KiB of SRAM (including the Stack), leaving 256 KiB for the OS
27-
(at 0x2000_0000 to 0x2003_FFFF). The RAM is actually split into three banks, but we can
28-
largely ignore that.
29-
*/
30-
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
31-
/* The SDRAM holds the LCD framebuffers */
24+
/* The first 128 KiB is for the BIOS. We get the rest. */
25+
FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 128K
26+
/*
27+
* We get the bottom 4KB of RAM. Anything above that is for applications
28+
* (up to wherever the BIOS tells us we can use.)
29+
*/
30+
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
3231
}
3332

3433
/* # Entry point = what the BIOS calls to start the OS */
Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -21,15 +21,13 @@
2121
/* Provides information about the memory layout of the device */
2222
MEMORY
2323
{
24-
/* The BIOS gets the first 128 KiB of Flash, leaving 1920 KiB for the OS */
25-
FLASH (rx) : ORIGIN = 0x10020000, LENGTH = 0x1E0000
24+
/* The first 128 KiB is for the BIOS. We get the rest. */
25+
FLASH (rx) : ORIGIN = 0x10020000, LENGTH = 128K
2626
/*
27-
* The RP2040 has 256 KiB of SRAM striped across four banks (for high
28-
* performance), plus a fifth bank containing another 8 KiB of RAM. The
29-
* BIOS is at the top of the high-performance RAM. We get the lower part.
27+
* We get the bottom 4KB of RAM. Anything above that is for applications
28+
* (up to wherever the BIOS tells us we can use.)
3029
*/
31-
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x3C000
32-
/* The SDRAM holds the LCD framebuffers */
30+
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
3331
}
3432

3533
/* # Entry point = what the BIOS calls to start the OS */

src/main.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -295,7 +295,7 @@ extern "C" fn main(api: &'static bios::Api) -> ! {
295295
let mut width = 0;
296296
let mut height = 0;
297297
(api.video_memory_info_get)(&mut addr, &mut width, &mut height);
298-
if addr != core::ptr::null_mut() {
298+
if !addr.is_null() {
299299
let mut vga = VgaConsole {
300300
addr,
301301
width,

0 commit comments

Comments
 (0)