Merge pull request #88 from Neotron-Compute/add-graphics

Add graphics

Author: thejpster

Cargo.lock

@@ -10,16 +10,18 @@ version = "0.6.0"
 [dependencies]
 # Useful Cortex-M specific functions (e.g. SysTick)
 cortex-m = "0.7"
-# The Raspberry Pi Pico HAL
+# The Raspberry Pi Pico BSP
 rp-pico = { version = "0.7", default-features = false, features = [
     "rt",
     "critical-section-impl",
     "rom-func-cache"
 ] }
+# The Raspberry Pi RP2040 HAL 
+rp2040-hal = { version = "0.8", features = [ "defmt" ] }
 # Cortex-M run-time (or start-up) code
 cortex-m-rt = "0.7"
 # The BIOS to OS API
-neotron-common-bios = "0.11.0"
+neotron-common-bios = "0.11.1"
 # For the RP2040 bootloader
 rp2040-boot2 = "0.3.0"
 # For hardware abstraction traits
@@ -62,7 +64,7 @@ embedded-sdmmc = { version = "0.5", default-features = false, features = [
 tlv320aic23 = "0.1.0"
 
 [build-dependencies]
-neotron-common-bios = "0.11.0"
+neotron-common-bios = "0.11.1"
 vte = "0.11"
 
 [[bin]]

Cargo.toml

@@ -25,15 +25,18 @@ MEMORY {
     /*
      * This is the bottom of the four striped banks of SRAM in the RP2040.
      */
-    RAM_OS : ORIGIN = 0x20000000, LENGTH = 0x38FE0
+    RAM_OS : ORIGIN = 0x20000000, LENGTH = 0x42000 - 0x9080
     /*
      * This is the top of the four striped banks of SRAM in the RP2040, plus
      * SRAM_BANK4 and SRAM_BANK5.
      *
      * This is carefully calculated to give us 8 KiB of stack space and ensure
      * the defmt buffer doesn't span across SRAM_BANK3 and SRAM_BANK4.
+     *
+     * 0x9080 should be the (size of .data + size of .bss + size of .uninit +
+     * 0x2000 for the stack).
      */
-    RAM : ORIGIN = 0x20038FE0, LENGTH = 0x9020
+    RAM : ORIGIN = 0x20042000 - 0x9080, LENGTH = 0x9080
 }
 
 /*

memory.x

@@ -1734,15 +1734,57 @@ pub extern "C" fn time_clock_set(time: common::Time) {
 /// Configuration data is, to the BIOS, just a block of bytes of a given
 /// length. How it stores them is up to the BIOS - it could be EEPROM, or
 /// battery-backed SRAM.
-pub extern "C" fn configuration_get(_buffer: FfiBuffer) -> ApiResult<usize> {
-	ApiResult::Err(CError::Unimplemented)
+pub extern "C" fn configuration_get(mut buffer: FfiBuffer) -> ApiResult<usize> {
+	let mut lock = HARDWARE.lock();
+	let hw = lock.as_mut().unwrap();
+	let Some(slice) = buffer.as_mut_slice() else {
+		return ApiResult::Err(CError::Unimplemented);
+	};
+	match hw.rtc.configuration_get(hw.i2c.acquire_i2c(), slice) {
+		Ok(n) => {
+			defmt::info!("Config Read {:x}", &slice[0..usize::from(n)]);
+			ApiResult::Ok(usize::from(n))
+		}
+		Err(rtc::Error::NoRtcFound) => {
+			defmt::info!("Can't get config - no RTC present");
+			ApiResult::Err(CError::InvalidDevice)
+		}
+		Err(rtc::Error::DriverBug) => {
+			defmt::warn!("Can't get config - Driver Bug");
+			ApiResult::Err(CError::DeviceError(0))
+		}
+		Err(rtc::Error::Bus(e)) => {
+			defmt::warn!("Can't get config - bus error {:?}", e);
+			ApiResult::Err(CError::DeviceError(1))
+		}
+	}
 }
 
 /// Set the configuration data block.
 ///
 /// See `configuration_get`.
-pub extern "C" fn configuration_set(_buffer: FfiByteSlice) -> ApiResult<()> {
-	ApiResult::Err(CError::Unimplemented)
+pub extern "C" fn configuration_set(buffer: FfiByteSlice) -> ApiResult<()> {
+	defmt::info!("Config save {:x}", buffer.as_slice());
+	let mut lock = HARDWARE.lock();
+	let hw = lock.as_mut().unwrap();
+	match hw
+		.rtc
+		.configuration_set(hw.i2c.acquire_i2c(), buffer.as_slice())
+	{
+		Ok(()) => ApiResult::Ok(()),
+		Err(rtc::Error::NoRtcFound) => {
+			defmt::info!("Can't save config - no RTC present");
+			ApiResult::Err(CError::InvalidDevice)
+		}
+		Err(rtc::Error::DriverBug) => {
+			defmt::warn!("Can't save config - Driver Bug");
+			ApiResult::Err(CError::DeviceError(0))
+		}
+		Err(rtc::Error::Bus(e)) => {
+			defmt::warn!("Can't save config - bus error {:?}", e);
+			ApiResult::Err(CError::DeviceError(0))
+		}
+	}
 }
 
 /// Does this Neotron BIOS support this video mode?
@@ -1760,6 +1802,7 @@ pub extern "C" fn video_is_valid_mode(mode: common::video::Mode) -> bool {
 /// pointer to a block of size `Mode::frame_size_bytes()` to
 /// `video_set_framebuffer` before any video will appear.
 pub extern "C" fn video_set_mode(mode: common::video::Mode) -> ApiResult<()> {
+	defmt::info!("Changing to mode {}", mode.as_u8());
 	if vga::set_video_mode(mode) {
 		ApiResult::Ok(())
 	} else {
@@ -1790,7 +1833,12 @@ pub extern "C" fn video_get_mode() -> common::video::Mode {
 /// to provide the 'basic' text buffer experience from reserves, so this
 /// function will never return `null` on start-up.
 pub extern "C" fn video_get_framebuffer() -> *mut u8 {
-	unsafe { vga::GLYPH_ATTR_ARRAY.as_mut_ptr() as *mut u8 }
+	let ptr = vga::CUSTOM_FB.load(Ordering::Relaxed);
+	if ptr.is_null() {
+		unsafe { vga::GLYPH_ATTR_ARRAY.as_mut_ptr() as *mut u8 }
+	} else {
+		ptr
+	}
 }
 
 /// Set the framebuffer address.
@@ -1804,8 +1852,9 @@ pub extern "C" fn video_get_framebuffer() -> *mut u8 {
 ///
 /// The pointer must point to enough video memory to handle the current video
 /// mode, and any future video mode you set.
-pub unsafe extern "C" fn video_set_framebuffer(_buffer: *const u8) -> ApiResult<()> {
-	ApiResult::Err(CError::Unimplemented)
+pub unsafe extern "C" fn video_set_framebuffer(buffer: *const u8) -> ApiResult<()> {
+	vga::CUSTOM_FB.store(buffer as *mut u8, Ordering::Relaxed);
+	ApiResult::Ok(())
 }
 
 /// Find out whether the given video mode needs more VRAM than we currently have.
@@ -2398,7 +2447,9 @@ extern "C" fn block_dev_eject(_dev_id: u8) -> ApiResult<()> {
 /// Sleep the CPU until the next interrupt.
 extern "C" fn power_idle() {
 	if !INTERRUPT_PENDING.load(Ordering::Relaxed) {
-		cortex_m::asm::wfe();
+		unsafe {
+			core::arch::asm!("wfe");
+		}
 	}
 }
 

src/main.rs

@@ -151,6 +151,95 @@ impl Rtc {
 			Self::None => Err(Error::NoRtcFound),
 		}
 	}
+
+	/// Store configuration in the RTC's RAM
+	pub fn configuration_set<T, E>(&mut self, bus: T, data: &[u8]) -> Result<(), Error<E>>
+	where
+		T: embedded_hal::blocking::i2c::WriteRead<Error = E>
+			+ embedded_hal::blocking::i2c::Write<Error = E>,
+	{
+		match self {
+			Self::Ds1307 => {
+				let mut driver = ds1307::Ds1307::new(bus);
+				driver.write_ram(1, data).map_err(|e| match e {
+					ds1307::Error::I2C(bus_error) => Error::Bus(bus_error),
+					ds1307::Error::InvalidInputData => Error::DriverBug,
+				})?;
+				driver
+					.write_ram(0, &[data.len() as u8])
+					.map_err(|e| match e {
+						ds1307::Error::I2C(bus_error) => Error::Bus(bus_error),
+						ds1307::Error::InvalidInputData => Error::DriverBug,
+					})
+			}
+			Self::Mcp7940n => {
+				let mut driver = mcp794xx::Mcp794xx::new_mcp7940n(bus);
+				driver.write_sram_data(1, data).map_err(|e| match e {
+					mcp794xx::Error::Comm(bus_error) => Error::Bus(bus_error),
+					mcp794xx::Error::InvalidInputData => Error::DriverBug,
+				})?;
+				driver
+					.write_sram_byte(0, data.len() as u8)
+					.map_err(|e| match e {
+						mcp794xx::Error::Comm(bus_error) => Error::Bus(bus_error),
+						mcp794xx::Error::InvalidInputData => Error::DriverBug,
+					})
+			}
+			Self::None => Err(Error::NoRtcFound),
+		}
+	}
+
+	/// Get configuration from the RTC's RAM
+	pub fn configuration_get<T, E>(&mut self, bus: T, mut data: &mut [u8]) -> Result<u8, Error<E>>
+	where
+		T: embedded_hal::blocking::i2c::WriteRead<Error = E>
+			+ embedded_hal::blocking::i2c::Write<Error = E>,
+	{
+		match self {
+			Self::Ds1307 => {
+				let mut driver = ds1307::Ds1307::new(bus);
+				if data.len() > 55 {
+					// This chip can only read 56 bytes (inc our count byte)
+					data = &mut data[0..55];
+				}
+				let mut count = [0u8; 1];
+				driver.read_ram(0, &mut count).map_err(|e| match e {
+					ds1307::Error::I2C(bus_error) => Error::Bus(bus_error),
+					ds1307::Error::InvalidInputData => Error::DriverBug,
+				})?;
+				driver.read_ram(1, data).map_err(|e| match e {
+					ds1307::Error::I2C(bus_error) => Error::Bus(bus_error),
+					ds1307::Error::InvalidInputData => Error::DriverBug,
+				})?;
+				if usize::from(count[0]) <= data.len() {
+					Ok(count[0])
+				} else {
+					Ok(0)
+				}
+			}
+			Self::Mcp7940n => {
+				if data.len() > 63 {
+					// This chip can only read 64 bytes (inc our count byte)
+					data = &mut data[0..63];
+				}
+				let mut driver = mcp794xx::Mcp794xx::new_mcp7940n(bus);
+				let count = driver.read_sram_byte(0).map_err(|e| match e {
+					mcp794xx::Error::Comm(bus_error) => Error::Bus(bus_error),
+					mcp794xx::Error::InvalidInputData => Error::DriverBug,
+				})?;
+				driver.read_sram_data(1, data).map_err(|e| match e {
+					mcp794xx::Error::Comm(bus_error) => Error::Bus(bus_error),
+					mcp794xx::Error::InvalidInputData => Error::DriverBug,
+				})?;
+				if usize::from(count) <= data.len() {
+					Ok(count)
+				} else {
+					Ok(0)
+				}
+			}
+			Self::None => Err(Error::NoRtcFound),
+		}
+	}
 }
 
 // -----------------------------------------------------------------------------

src/rtc.rs

@@ -1,6 +1,6 @@
-This is Neotron OS version v0.5.0
+This is Neotron OS version v0.6.0
 
-Taken from https://github.com/Neotron-Compute/Neotron-OS/releases/tag/v0.5.0
+Taken from https://github.com/Neotron-Compute/Neotron-OS/releases/tag/v0.6.0
 
 This program is free software: you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by