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Commit 72a1085
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Enhance Tetris simulation and RNG handling in
- Updated the random number generation mechanism to use an 8-bit LFSR for improved synthesis compatibility and to prevent constant-folding issues.
- Refactored game logic to ensure proper piece spawning and movement, enhancing gameplay experience.
- Improved game-over detection and row validation to ensure accurate game state representation.
- Cleaned up comments and code structure for better readability and maintainability.tetris6x6 module1 parent 97becc2 commit 72a1085
3 files changed
Lines changed: 259 additions & 189 deletions
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- include/phy_engine/verilog/digital
- test/0031.tetris6x6
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