Fixing up typos / bugs

Author: gilbertlee-amd

CHANGELOG.md

@@ -14,7 +14,7 @@ Documentation for TransferBench is available at
 - Adding NIC_CQ_POLL_BATCH to control CQ poll batch size for NIC transfers
 - New "hbm" preset which sweeps and tests local HBM read performance
 - Added a new TB_WALLCLOCK_RATE that will override GPU GFX wallclock rate if it returns 0 (debug)
-- Adding new batched-DMA executor "B", which utilizes the hipMemcpyBatchAsync API introduced in HIP 7.0
+- Adding new batched-DMA executor "B", which utilizes the hipMemcpyBatchAsync API introduced in HIP 7.1
 - Added new bmasweep preset that compares DMA to batched DMA execution for parallel transfers to other GPUs
 
 ### Modified

src/header/TransferBench.hpp

@@ -79,9 +79,8 @@ THE SOFTWARE.
 /// @endcond
 
 // Batched DMA executor is only supported with HIP >= 7.1
-#if defined(__HIP_PLATFORM_AMD__) && \
-    defined(HIP_VERSION_MAJOR) && (HIP_VERSION_MAJOR >= 7) && \
-    defined(HIP_VERSION_MINOR) && (HIP_VERSION_MINOR >= 1)
+#if defined(__HIP_PLATFORM_AMD__) && defined(HIP_VERSION_MAJOR) && defined(HIP_VERSION_MINOR) && \
+  ((HIP_VERSION_MAJOR > 7) || (HIP_VERSION_MAJOR == 7 && HIP_VERSION_MINOR >= 1))
 #define BMA_EXEC_ENABLED
 #endif
 
@@ -3892,7 +3891,7 @@ static bool IsConfiguredGid(union ibv_gid const& gid)
     rss.batchSrcs.clear();
     rss.batchBytes.clear();
 
-    if (transfer.exeDevice.exeType == EXE_GPU_BMDA) {
+    if (transfer.exeDevice.exeType == EXE_GPU_BDMA) {
       for (int i = 0; i < transfer.numSubExecs; ++i) {
         for (int j = 0; j < (int)rss.dstMem.size(); j++) {
           rss.batchSrcs.push_back(subExecParam[i].src[0]);