From 3c7202f2421ec419845a966b3a64bd89904e2846 Mon Sep 17 00:00:00 2001
From: 94xhn <87560781+94xhn@users.noreply.github.com>
Date: Sat, 11 Jul 2026 17:53:27 +0800
Subject: [PATCH] fix(linker): correct cross-toolchain memory map
 inconsistencies

Found by cross-checking each example's GCC (SW4STM32)/IAR (EWARM)/Keil
(MDK-ARM) linker scripts against each other and against known-good
Templates sibling projects, following the same audit already done for
STM32CubeG4/WB/WL/U5/F7/F4/L4/H7/F1 in this repo family.

1. Demonstrations (32L0538DISCOVERY, STM32L053C8, 64K flash): GCC's
   .ld declares FLASH LENGTH=192K - directly contradicting its own
   doc-comment header two lines above, which correctly says "64Kbytes
   FLASH". IAR's .icf and Keil's <Device>STM32L053C8Tx</Device>/OCR
   both correctly use 64K, matching this board's Templates project.
   Fixed GCC's .ld to 64K.

2. Applications/IAP/IAP_Binary_Template (STM32L073Z-EVAL, STM32L073VZ,
   192K flash): both GCC's .ld and Keil's .uvprojx correctly offset
   the app's flash start address to 0x08005000 to leave room for the
   bootloader, but neither shrinks the length to compensate - both
   still declare 192K as if starting from 0x08000000, running 20K
   past the chip's actual end of flash. IAR's .icf correctly uses
   172K (0x08005000-0x0802FFFF). This is a "2-of-3-toolchains-wrong"
   case - a naive majority vote here would have picked the wrong
   answer, similar to what was already found in
   STM32CubeWB/F7/F4/H7/F1. Fixed GCC's .ld and Keil's OCR_RVCT4 Size
   to 172K (0x2B000), matching IAR.

Two further candidates (Examples/FIREWALL/FIREWALL_VolatileData_Executable
and FIREWALL_VolatileData_Shared, same board) were investigated but not
included here: each demo uses a genuinely different, hand-tuned memory
partition per toolchain to exercise the STM32L0 FIREWALL peripheral's
protected-segment feature (e.g. IAR's "ROM"/"RAM" region names refer to
small SRAM-resident protected zones in one variant, and a mix of small
flash regions plus a separate protected sub-region in the other) -
this isn't the toolchain-drift pattern the other fixes address, and
verifying the "correct" partition would require deeper FIREWALL
peripheral domain knowledge than I have confidence in, so I left them
alone rather than guess.

No local ARM toolchain (arm-none-eabi-gcc/IAR/Keil) available to
compile/link-test these changes; verification relied on
address-arithmetic cross-referencing against multiple independent
references per finding (Templates gold standards, sibling toolchain
files of the same project, and the Keil <Device> tag naming the
actual target chip).

Signed-off-by: 94xhn <87560781+94xhn@users.noreply.github.com>
---
 .../SW4STM32/STM32L0538-Discovery/STM32L053C8Tx_FLASH.ld        | 2 +-
 .../IAP/IAP_Binary_Template/MDK-ARM/Project.uvprojx             | 2 +-
 .../SW4STM32/STM32L073Z_EVAL/STM32L073VZTx_FLASH.ld             | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/Projects/32L0538DISCOVERY/Demonstrations/SW4STM32/STM32L0538-Discovery/STM32L053C8Tx_FLASH.ld b/Projects/32L0538DISCOVERY/Demonstrations/SW4STM32/STM32L0538-Discovery/STM32L053C8Tx_FLASH.ld
index fb3e91ddb..6766370b0 100644
--- a/Projects/32L0538DISCOVERY/Demonstrations/SW4STM32/STM32L0538-Discovery/STM32L053C8Tx_FLASH.ld
+++ b/Projects/32L0538DISCOVERY/Demonstrations/SW4STM32/STM32L0538-Discovery/STM32L053C8Tx_FLASH.ld
@@ -44,7 +44,7 @@ _Min_Stack_Size = 0x1200; /* required amount of stack */
 /* Specify the memory areas */
 MEMORY
 {
-FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 192K
+FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 64K
 RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 20K
 }
 
diff --git a/Projects/STM32L073Z-EVAL/Applications/IAP/IAP_Binary_Template/MDK-ARM/Project.uvprojx b/Projects/STM32L073Z-EVAL/Applications/IAP/IAP_Binary_Template/MDK-ARM/Project.uvprojx
index 224ec26c9..bc44f1810 100644
--- a/Projects/STM32L073Z-EVAL/Applications/IAP/IAP_Binary_Template/MDK-ARM/Project.uvprojx
+++ b/Projects/STM32L073Z-EVAL/Applications/IAP/IAP_Binary_Template/MDK-ARM/Project.uvprojx
@@ -314,7 +314,7 @@
               <OCR_RVCT4>
                 <Type>1</Type>
                 <StartAddress>0x8005000</StartAddress>
-                <Size>0x30000</Size>
+                <Size>0x2B000</Size>
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
diff --git a/Projects/STM32L073Z-EVAL/Applications/IAP/IAP_Binary_Template/SW4STM32/STM32L073Z_EVAL/STM32L073VZTx_FLASH.ld b/Projects/STM32L073Z-EVAL/Applications/IAP/IAP_Binary_Template/SW4STM32/STM32L073Z_EVAL/STM32L073VZTx_FLASH.ld
index 6d42679ec..7bf3a0a81 100644
--- a/Projects/STM32L073Z-EVAL/Applications/IAP/IAP_Binary_Template/SW4STM32/STM32L073Z_EVAL/STM32L073VZTx_FLASH.ld
+++ b/Projects/STM32L073Z-EVAL/Applications/IAP/IAP_Binary_Template/SW4STM32/STM32L073Z_EVAL/STM32L073VZTx_FLASH.ld
@@ -41,7 +41,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
 /* Specify the memory areas */
 MEMORY
 {
-FLASH (rx)      : ORIGIN = 0x08005000, LENGTH = 192K
+FLASH (rx)      : ORIGIN = 0x08005000, LENGTH = 172K
 RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 20K
 }