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# cache-simulator
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Project for Computer Architecture.
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Optional project for Computer Architecture (2021).
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It's an 8-line cache memory simulator, written in Java, represented as a matrix in console.
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It only operates with memory addresses and determines access times, hit/miss rates and how it stores information within the cache.
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Memory data is not coded for operations, so it's not involved.
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Writing policy is Write-back.
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Word, block and set sizes are configurable, as well as the replacement policies to use: FIFO or LRU.
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Have fun testing! :3

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