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jhkim-pii
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claude
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Fix report_checks -fields {nets} typo to {net} across test scripts
The valid field name is "net" (singular) per search/Search.tcl. Using "nets" triggered Warning 168 (unknown field) silently in 29 test scripts. Fix the field name and regolden .ok files. Co-Authored-By: Claude <noreply@anthropic.com> Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com>
1 parent b30c82b commit 616cb62

58 files changed

Lines changed: 196 additions & 70 deletions

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‎graph/test/graph_bidirect.ok‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,6 @@ No paths found.
6868
No paths found.
6969
No paths found.
7070
--- Test 3: report with fields ---
71-
Warning 168: graph_bidirect.tcl line 1, unknown field nets.
7271
Startpoint: d1 (input port clocked by clk)
7372
Endpoint: reg2 (rising edge-triggered flip-flop clocked by clk)
7473
Path Group: clk
@@ -80,12 +79,16 @@ Fanout Cap Slew Delay Time Description
8079
0.00 0.00 clock network delay (ideal)
8180
0.00 0.00 v input external delay
8281
1 0.88 0.10 0.00 0.00 v d1 (in)
82+
d1 (net)
8383
0.10 0.00 0.00 v buf1/A (BUF_X1)
8484
2 1.67 0.01 0.06 0.06 v buf1/Z (BUF_X1)
85+
n1 (net)
8586
0.01 0.00 0.06 v or1/A1 (OR2_X1)
8687
2 1.96 0.01 0.05 0.10 v or1/ZN (OR2_X1)
88+
n6 (net)
8789
0.01 0.00 0.10 v and2/A2 (AND2_X1)
8890
1 1.06 0.01 0.03 0.13 v and2/ZN (AND2_X1)
91+
n9 (net)
8992
0.01 0.00 0.13 v reg2/D (DFF_X1)
9093
0.13 data arrival time
9194

‎graph/test/graph_bidirect.tcl‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ report_checks -from [get_ports d3] -to [get_ports q4]
4141
# Test 3: Fields that exercise graph delay/slew queries
4242
#---------------------------------------------------------------
4343
puts "--- Test 3: report with fields ---"
44-
report_checks -fields {slew cap input_pins nets fanout}
44+
report_checks -fields {slew cap input_pins net fanout}
4545

4646
report_checks -format full_clock
4747

‎graph/test/graph_delete_modify.ok‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,6 @@ Path Type: min
5858
1.03 slack (MET)
5959

6060

61-
Warning 168: graph_delete_modify.tcl line 1, unknown field nets.
6261
Startpoint: d2 (input port clocked by clk)
6362
Endpoint: reg2 (rising edge-triggered flip-flop clocked by clk)
6463
Path Group: clk
@@ -70,12 +69,16 @@ Fanout Cap Slew Delay Time Description
7069
0.00 0.00 clock network delay (ideal)
7170
1.00 1.00 v input external delay
7271
1 0.88 0.10 0.00 1.00 v d2 (in)
72+
d2 (net)
7373
0.10 0.00 1.00 v buf2/A (BUF_X1)
7474
2 1.69 0.01 0.06 1.06 v buf2/Z (BUF_X1)
75+
n2 (net)
7576
0.01 0.00 1.06 v or1/A1 (OR2_X1)
7677
2 2.56 0.01 0.05 1.11 v or1/ZN (OR2_X1)
78+
n6 (net)
7779
0.01 0.00 1.11 v nand1/A2 (NAND2_X1)
7880
1 1.14 0.01 0.02 1.12 ^ nand1/ZN (NAND2_X1)
81+
n7 (net)
7982
0.01 0.00 1.12 ^ reg2/D (DFF_X1)
8083
1.12 data arrival time
8184

‎graph/test/graph_delete_modify.tcl‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@ report_checks
2626

2727
report_checks -path_delay min
2828

29-
report_checks -fields {slew cap input_pins nets fanout}
29+
report_checks -fields {slew cap input_pins net fanout}
3030

3131
#---------------------------------------------------------------
3232
# Test 2: Add multiple instances and nets, then delete

‎graph/test/graph_modify.ok‎

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2551,7 +2551,6 @@ A2 -> ZN combinational
25512551
^ -> ^ 0.02:0.02:0.09:0.09
25522552
v -> v 0.02:0.02:0.16:0.16
25532553
--- fields per corner ---
2554-
Warning 168: graph_modify.tcl line 1, unknown field nets.
25552554
Startpoint: d1 (input port clocked by clk1)
25562555
Endpoint: q3 (output port clocked by clk1)
25572556
Path Group: clk1
@@ -2564,14 +2563,19 @@ Fanout Cap Slew Delay Time Description
25642563
0.00 0.00 clock network delay (ideal)
25652564
1.00 1.00 v input external delay
25662565
1 0.91 0.10 0.00 1.00 v d1 (in)
2566+
d1 (net)
25672567
0.10 0.00 1.00 v buf1/A (BUF_X1)
25682568
2 2.36 0.01 0.04 1.04 v buf1/Z (BUF_X1)
2569+
n1 (net)
25692570
0.01 0.00 1.04 v and1/A1 (AND2_X1)
25702571
1 1.60 0.00 0.02 1.06 v and1/ZN (AND2_X1)
2572+
n5 (net)
25712573
0.00 0.00 1.06 v nand1/A1 (NAND2_X1)
25722574
3 6.91 0.01 0.01 1.07 ^ nand1/ZN (NAND2_X1)
2575+
n7 (net)
25732576
0.01 0.00 1.07 ^ buf4/A (BUF_X4)
25742577
1 0.00 0.00 0.01 1.09 ^ buf4/Z (BUF_X4)
2578+
q3 (net)
25752579
0.00 0.00 1.09 ^ q3 (out)
25762580
1.09 data arrival time
25772581

@@ -2599,6 +2603,7 @@ Fanout Cap Slew Delay Time Description
25992603
0.00 10.00 clock network delay (ideal)
26002604
0.00 0.00 10.00 ^ reg1/CK (DFF_X1)
26012605
1 1.16 0.00 0.05 10.05 ^ reg1/Q (DFF_X1)
2606+
n11 (net)
26022607
0.00 0.00 10.05 ^ reg3/D (DFF_X1)
26032608
10.05 data arrival time
26042609

@@ -2615,7 +2620,6 @@ Fanout Cap Slew Delay Time Description
26152620
4.93 slack (MET)
26162621

26172622

2618-
Warning 168: graph_modify.tcl line 1, unknown field nets.
26192623
Startpoint: d1 (input port clocked by clk1)
26202624
Endpoint: q3 (output port clocked by clk1)
26212625
Path Group: clk1
@@ -2628,14 +2632,19 @@ Fanout Cap Slew Delay Time Description
26282632
0.00 0.00 clock network delay (ideal)
26292633
1.00 1.00 v input external delay
26302634
1 0.84 0.10 0.00 1.00 v d1 (in)
2635+
d1 (net)
26312636
0.10 0.00 1.00 v buf1/A (BUF_X1)
26322637
2 2.20 0.02 0.14 1.14 v buf1/Z (BUF_X1)
2638+
n1 (net)
26332639
0.02 0.00 1.14 v and1/A1 (AND2_X1)
26342640
1 1.45 0.02 0.09 1.23 v and1/ZN (AND2_X1)
2641+
n5 (net)
26352642
0.02 0.00 1.23 v nand1/A1 (NAND2_X1)
26362643
3 6.52 0.07 0.09 1.32 ^ nand1/ZN (NAND2_X1)
2644+
n7 (net)
26372645
0.07 0.00 1.32 ^ buf4/A (BUF_X4)
26382646
1 0.00 0.01 0.07 1.38 ^ buf4/Z (BUF_X4)
2647+
q3 (net)
26392648
0.01 0.00 1.38 ^ q3 (out)
26402649
1.38 data arrival time
26412650

@@ -2663,6 +2672,7 @@ Fanout Cap Slew Delay Time Description
26632672
0.00 10.00 clock network delay (ideal)
26642673
0.00 0.00 10.00 ^ reg1/CK (DFF_X1)
26652674
1 1.03 0.02 0.23 10.23 v reg1/Q (DFF_X1)
2675+
n11 (net)
26662676
0.02 0.00 10.23 v reg3/D (DFF_X1)
26672677
10.23 data arrival time
26682678

‎graph/test/graph_modify.tcl‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -228,9 +228,9 @@ report_edges -from [get_pins or2/A2] -to [get_pins or2/ZN]
228228
# report_checks with fields per corner
229229
#---------------------------------------------------------------
230230
puts "--- fields per corner ---"
231-
report_checks -corner fast -fields {slew cap input_pins nets fanout}
231+
report_checks -corner fast -fields {slew cap input_pins net fanout}
232232

233-
report_checks -corner slow -fields {slew cap input_pins nets fanout}
233+
report_checks -corner slow -fields {slew cap input_pins net fanout}
234234

235235
report_checks -corner fast -format full_clock
236236

‎graph/test/graph_operations.ok‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1784,7 +1784,6 @@ Path Type: max
17841784

17851785

17861786
--- report_checks options ---
1787-
Warning 168: graph_operations.tcl line 1, unknown field nets.
17881787
Startpoint: d1 (input port clocked by clk1)
17891788
Endpoint: q3 (output port clocked by clk1)
17901789
Path Group: clk1
@@ -1796,14 +1795,19 @@ Fanout Cap Slew Delay Time Description
17961795
0.00 0.00 clock network delay (ideal)
17971796
1.00 1.00 v input external delay
17981797
1 0.88 0.10 0.00 1.00 v d1 (in)
1798+
d1 (net)
17991799
0.10 0.00 1.00 v buf1/A (BUF_X1)
18001800
2 2.29 0.01 0.06 1.06 v buf1/Z (BUF_X1)
1801+
n1 (net)
18011802
0.01 0.00 1.06 v and1/A1 (AND2_X1)
18021803
1 1.53 0.01 0.03 1.09 v and1/ZN (AND2_X1)
1804+
n5 (net)
18031805
0.01 0.00 1.09 v nand1/A1 (NAND2_X1)
18041806
3 6.80 0.02 0.03 1.11 ^ nand1/ZN (NAND2_X1)
1807+
n7 (net)
18051808
0.02 0.00 1.11 ^ buf4/A (BUF_X4)
18061809
1 0.00 0.00 0.02 1.13 ^ buf4/Z (BUF_X4)
1810+
q3 (net)
18071811
0.00 0.00 1.13 ^ q3 (out)
18081812
1.13 data arrival time
18091813

@@ -1830,6 +1834,7 @@ Fanout Cap Slew Delay Time Description
18301834
0.00 10.00 clock network delay (ideal)
18311835
0.00 0.00 10.00 ^ reg1/CK (DFF_X1)
18321836
1 1.06 0.01 0.08 10.08 v reg1/Q (DFF_X1)
1837+
n11 (net)
18331838
0.01 0.00 10.08 v reg3/D (DFF_X1)
18341839
10.08 data arrival time
18351840

‎graph/test/graph_operations.tcl‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -241,7 +241,7 @@ report_check_types -max_delay -min_delay -verbose
241241
# report_checks with various options
242242
#---------------------------------------------------------------
243243
puts "--- report_checks options ---"
244-
report_checks -fields {slew cap input_pins nets fanout}
244+
report_checks -fields {slew cap input_pins net fanout}
245245

246246
report_checks -format full_clock
247247

‎network/test/network_advanced.ok‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -210,7 +210,6 @@ Path Type: max
210210

211211
No paths found.
212212
No paths found.
213-
Warning 168: network_advanced.tcl line 1, unknown field nets.
214213
Startpoint: in1 (input port clocked by clk)
215214
Endpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
216215
Path Group: clk
@@ -222,10 +221,13 @@ Fanout Cap Slew Delay Time Description
222221
0.00 0.00 clock network delay (ideal)
223222
0.00 0.00 v input external delay
224223
1 0.88 0.00 0.00 0.00 v in1 (in)
224+
in1 (net)
225225
0.00 0.00 0.00 v buf1/A (BUF_X1)
226226
1 0.87 0.00 0.02 0.02 v buf1/Z (BUF_X1)
227+
n1 (net)
227228
0.00 0.00 0.02 v and1/A1 (AND2_X1)
228229
1 1.06 0.01 0.02 0.05 v and1/ZN (AND2_X1)
230+
n2 (net)
229231
0.01 0.00 0.05 v reg1/D (DFF_X1)
230232
0.05 data arrival time
231233

‎network/test/network_advanced.tcl‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -204,5 +204,5 @@ report_checks -from [get_ports in1] -to [get_ports out1]
204204
report_checks -from [get_ports in2] -to [get_ports out1]
205205

206206
# Report with various field combinations
207-
report_checks -fields {slew cap input_pins nets fanout}
207+
report_checks -fields {slew cap input_pins net fanout}
208208
report_checks -format full_clock_expanded

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