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stm32: Add Zephyr BLE HCI driver and IPCC integration.
Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
1 parent 9555510 commit 90526a3

33 files changed

Lines changed: 977 additions & 76 deletions

‎ports/stm32/Makefile‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -494,6 +494,15 @@ SRC_C += mpbtstackport.c
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MICROPY_BLUETOOTH_BTSTACK_H4 ?= 1
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endif
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497+
ifeq ($(MICROPY_BLUETOOTH_ZEPHYR),1)
498+
SRC_C += mpzephyrport.c
499+
# Define STM32 port flag for Zephyr BLE CMSIS header selection
500+
CFLAGS += -D__ZEPHYR_BLE_STM32_PORT__
501+
# Enable L2CAP channels (must be passed as CFLAGS for Zephyr sources)
502+
CFLAGS += -DMICROPY_PY_BLUETOOTH_ENABLE_L2CAP_CHANNELS=1
503+
include $(TOP)/extmod/zephyr_ble/zephyr_ble.mk
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endif
505+
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endif # MICROPY_PY_BLUETOOTH
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499508
# Add stm32-specific implementation of libmetal (and optionally OpenAMP's rproc).
@@ -522,6 +531,13 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_CXX:.cpp=.o))
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OBJ += $(GEN_PINS_SRC:.c=.o)
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534+
# Zephyr BLE third-party sources are added to SRC_THIRDPARTY_C by zephyr_ble.mk
535+
# after extmod.mk has already processed SRC_THIRDPARTY_C into PY_O.
536+
# Add them explicitly here since they won't be in PY_O.
537+
ifeq ($(MICROPY_BLUETOOTH_ZEPHYR),1)
538+
OBJ += $(addprefix $(BUILD)/, $(SRC_THIRDPARTY_C:.c=.o))
539+
endif
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# This file contains performance critical functions so turn up the optimisation
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# level. It doesn't add much to the code size and improves performance a bit.
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# Don't use -O3 with this file because gcc tries to optimise memset in terms of itself.

‎ports/stm32/adc.c‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -134,9 +134,7 @@
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defined(STM32F407xx) || defined(STM32F417xx) || \
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defined(STM32F401xC) || defined(STM32F401xE)
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#define VBAT_DIV (2)
137-
#elif defined(STM32F411xE) || \
138-
defined(STM32F412Cx) || defined(STM32F412Rx) || \
139-
defined(STM32F412Vx) || defined(STM32F412Zx) || \
137+
#elif defined(STM32F411xE) || defined(STM32F412Zx) || \
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defined(STM32F413xx) || defined(STM32F427xx) || \
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defined(STM32F429xx) || defined(STM32F437xx) || \
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defined(STM32F439xx) || defined(STM32F446xx) || \
@@ -156,7 +154,7 @@
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defined(STM32H743xx) || defined(STM32H747xx) || \
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defined(STM32H7A3xx) || defined(STM32H7A3xxQ) || \
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defined(STM32H7B3xx) || defined(STM32H7B3xxQ) || \
159-
defined(STM32H750xx) || defined(STM32H753xx)
157+
defined(STM32H750xx)
160158
#define VBAT_DIV (4)
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#elif defined(STM32L432xx) || \
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defined(STM32L451xx) || defined(STM32L452xx) || \

‎ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
MCU_SERIES = f4
22
CMSIS_MCU = STM32F412Zx
33
AF_FILE = boards/stm32f412_af.csv
4-
LD_FILES = boards/stm32f412xg.ld boards/common_ifs.ld
4+
LD_FILES = boards/stm32f412zx.ld boards/common_ifs.ld
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TEXT0_ADDR = 0x08000000
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TEXT1_ADDR = 0x08020000
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‎ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.h‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,16 @@
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#define MICROPY_HW_HAS_SWITCH (1)
1010
#define MICROPY_HW_HAS_FLASH (0) // QSPI extflash not mounted
1111

12+
#define MICROPY_PY_ASYNCIO (0)
13+
#define MICROPY_PY_DEFLATE (0)
14+
#define MICROPY_PY_BINASCII (0)
15+
#define MICROPY_PY_HASHLIB (0)
16+
#define MICROPY_PY_JSON (0)
17+
#define MICROPY_PY_RE (0)
18+
#define MICROPY_PY_FRAMEBUF (0)
19+
#define MICROPY_PY_SOCKET (0)
20+
#define MICROPY_PY_NETWORK (0)
21+
1222
// The board has an 24MHz HSE, the following gives 170MHz CPU speed
1323
#define MICROPY_HW_CLK_PLLM (6)
1424
#define MICROPY_HW_CLK_PLLN (85)

‎ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,3 @@ MICROPY_VFS_LFS2 = 1
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MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
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2626
FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py
27-
28-
# Flash tool configuration
29-
OPENOCD_CONFIG = boards/openocd_stm32h7_dual_bank.cfg

‎ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ void NUCLEO_H743ZI_board_early_init(void);
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#define MICROPY_HW_CLK_PLLM (4)
1818
#define MICROPY_HW_CLK_PLLN (400)
1919
#define MICROPY_HW_CLK_PLLP (2)
20-
#define MICROPY_HW_CLK_PLLQ (8)
20+
#define MICROPY_HW_CLK_PLLQ (4)
2121
#define MICROPY_HW_CLK_PLLR (2)
2222
#define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_1)
2323
#define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE)
@@ -37,16 +37,14 @@ void NUCLEO_H743ZI_board_early_init(void);
3737
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4
3838

3939
// UART config
40-
#define MICROPY_HW_UART1_TX (pin_B6)
41-
#define MICROPY_HW_UART1_RX (pin_B15)
4240
#define MICROPY_HW_UART2_TX (pin_D5)
4341
#define MICROPY_HW_UART2_RX (pin_D6)
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#define MICROPY_HW_UART2_RTS (pin_D4)
4543
#define MICROPY_HW_UART2_CTS (pin_D3)
4644
#define MICROPY_HW_UART3_TX (pin_D8)
4745
#define MICROPY_HW_UART3_RX (pin_D9)
48-
// #define MICROPY_HW_UART5_TX (pin_B6) // conflict with UART1_TX
49-
// #define MICROPY_HW_UART5_RX (pin_B12) // conflict with Ethernet MII mode
46+
#define MICROPY_HW_UART5_TX (pin_B6)
47+
#define MICROPY_HW_UART5_RX (pin_B12)
5048
#define MICROPY_HW_UART6_TX (pin_C6)
5149
#define MICROPY_HW_UART6_RX (pin_C7)
5250
#define MICROPY_HW_UART7_TX (pin_F7)

‎ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,3 @@ MICROPY_VFS_LFS2 = 1
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MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
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2626
FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py
27-
28-
# Flash tool configuration
29-
OPENOCD_CONFIG = boards/openocd_stm32h7_dual_bank.cfg

‎ports/stm32/boards/NUCLEO_H743ZI/pins.csv‎

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Original file line numberDiff line numberDiff line change
@@ -105,8 +105,6 @@ USB_VBUS,PA9
105105
USB_ID,PA10
106106
USB_DM,PA11
107107
USB_DP,PA12
108-
UART1_TX,PB6
109-
UART1_RX,PB15
110108
UART2_TX,PD5
111109
UART2_RX,PD6
112110
UART2_RTS,PD4

‎ports/stm32/boards/NUCLEO_H743ZI2/pins.csv‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -105,8 +105,6 @@ USB_VBUS,PA9
105105
USB_ID,PA10
106106
USB_DM,PA11
107107
USB_DP,PA12
108-
UART1_TX,PB6
109-
UART1_RX,PB15
110108
UART2_TX,PD5
111109
UART2_RX,PD6
112110
UART2_RTS,PD4

‎ports/stm32/boards/NUCLEO_WB55/mpconfigboard.h‎

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Original file line numberDiff line numberDiff line change
@@ -62,6 +62,9 @@
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#define MICROPY_HW_USB_CDC_RX_DATA_SIZE (512)
6363
#define MICROPY_HW_USB_CDC_TX_DATA_SIZE (512)
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65+
// Clock config
66+
#define MICROPY_HW_CLK_HSE_VALUE (32000000)
67+
6568
// Bluetooth config
6669
#define MICROPY_HW_BLE_UART_ID (0)
6770
#define MICROPY_HW_BLE_UART_BAUDRATE (115200)

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