[gem5] Add waiting state to SimpleMemory. Expose access deny due to THNVM schemes.

Author: basicthinker

addr_trans_controller.cc

@@ -60,6 +60,7 @@ Addr AddrTransController::NVMStore(Addr phy_addr, int size) {
       mach_addr = att_.Translate(phy_addr, mach_base);
     }
     mem_store_->OnNVMWrite(mach_addr, size);
+    return mach_addr;
   } else { // in checkpointing
     if (index != -EINVAL) { // found
       const ATTEntry& entry = att_.At(index);
@@ -84,8 +85,8 @@ Addr AddrTransController::NVMStore(Addr phy_addr, int size) {
       mach_addr = att_.Translate(phy_addr, mach_base);
     }
     mem_store_->OnDRAMWrite(mach_addr, size);
+    return mach_addr;
   }
-  return mach_addr;
 }
 
 Addr AddrTransController::DRAMStore(Addr phy_addr, int size) {

gem5-stable/src/mem/abstract_mem.cc

@@ -328,7 +328,7 @@ AbstractMemory::checkLockedAddrList(PacketPtr pkt)
 
 #endif
 
-void
+bool
 AbstractMemory::access(PacketPtr pkt)
 {
     assert(AddrRange(pkt->getAddr(),
@@ -337,7 +337,7 @@ AbstractMemory::access(PacketPtr pkt)
     if (pkt->memInhibitAsserted()) {
         DPRINTF(MemoryAccess, "mem inhibited on 0x%x: not responding\n",
                 pkt->getAddr());
-        return;
+        return true;
     }
 
     if (pkt->cmd == MemCmd::SwapReq) {
@@ -373,7 +373,7 @@ AbstractMemory::access(PacketPtr pkt)
         if (overwrite_mem) {
             Addr local_addr = addrController.StoreAddr(
                     localAddr(pkt), pkt->getSize());
-            if (local_addr == INVAL_ADDR) return;
+            if (local_addr == INVAL_ADDR) return false;
             host_addr = hostAddr(local_addr);
             std::memcpy(host_addr, &overwrite_val, pkt->getSize());
         }
@@ -403,7 +403,7 @@ AbstractMemory::access(PacketPtr pkt)
                 assert(pkt->getSize() == addrController.cache_block_size());
                 Addr local_addr = addrController.StoreAddr(
                         localAddr(pkt), pkt->getSize());
-                if (local_addr == INVAL_ADDR) return;
+                if (local_addr == INVAL_ADDR) return false;
                 memcpy(hostAddr(local_addr), pkt->getPtr<uint8_t>(),
                         pkt->getSize());
                 DPRINTF(MemoryAccess, "%s wrote %x bytes to address %x\n",
@@ -423,6 +423,8 @@ AbstractMemory::access(PacketPtr pkt)
     if (pkt->needsResponse()) {
         pkt->makeResponse();
     }
+
+    return true;
 }
 
 void

gem5-stable/src/mem/abstract_mem.hh

@@ -315,8 +315,9 @@ class AbstractMemory : public MemObject, public MemStore
      * is turned into a response if required.
      *
      * @param pkt Packet performing the access
+     * @return if this packet is serviced in THNVM schemes
      */
-    void access(PacketPtr pkt);
+    bool access(PacketPtr pkt);
 
     /**
      * Perform an untimed memory read or write without changing

gem5-stable/src/mem/simple_mem.cc

@@ -53,7 +53,7 @@ SimpleMemory::SimpleMemory(const SimpleMemoryParams* p) :
     tATTOp(p->lat_att_operate), tBufferOp(p->lat_buffer_operate),
     tNVMRead(p->lat_nvm_read), tNVMWrite(p->lat_nvm_write),
     isTimingATT(p->is_timing_att), latency_var(p->latency_var),
-    bandwidth(p->bandwidth), isBusy(false),
+    bandwidth(p->bandwidth), isBusy(false), isWaiting(false),
     retryReq(false), retryResp(false),
     releaseEvent(this), unfreezeEvent(this),
     dequeueEvent(this), drainManager(NULL)
@@ -95,7 +95,7 @@ SimpleMemory::regStats()
 Tick
 SimpleMemory::recvAtomic(PacketPtr pkt)
 {
-    access(pkt);
+    assert(access(pkt)); //TODO
     return pkt->memInhibitAsserted() ? 0 : getLatency();
 }
 
@@ -168,13 +168,12 @@ SimpleMemory::recvTimingReq(PacketPtr pkt)
     // queue if there is one
     bool needsResponse = pkt->needsResponse();
     assert(sumLatency == 0 && sumSize == 0);
-    recvAtomic(pkt);
-    // turn packet around to go back to requester if response expected
-    Tick lat = isTimingATT ? sumLatency : getLatency();
-    if (retryReq) {
+    if (!access(pkt)) {
         sumLatency = sumSize = 0;
         return false;
     }
+    // turn packet around to go back to requester if response expected
+    Tick lat = isTimingATT ? sumLatency : getLatency();
     if (needsResponse) {
         // recvAtomic() should already have turned packet into
         // atomic response
@@ -220,14 +219,14 @@ SimpleMemory::OnCheckpointing(int num_new_at, int num_new_pt)
             totalChkptTime += chkpt_duration;
         }
     } else {
-        unfreeze();
+      addrController.FinishCheckpointing();
     }
 }
 
 void
 SimpleMemory::OnWaiting()
 {
-    retryReq = true;
+    isWaiting = true;
 }
 
 void
@@ -245,8 +244,8 @@ void
 SimpleMemory::unfreeze()
 {
     addrController.FinishCheckpointing();
-    if (retryReq) {
-        retryReq = false;
+    if (isWaiting) {
+        isWaiting = false;
         port.sendRetry();
     }
 }

gem5-stable/src/mem/simple_mem.hh

@@ -149,6 +149,9 @@ class SimpleMemory : public AbstractMemory
      */
     bool isBusy;
 
+    /** Track THNVM waiting state */
+    bool isWaiting;
+
     /**
      * Remember if we have to retry an outstanding request that
      * arrived while we were busy.