adi, cortex: Add Cortex-A53 identifiers from BCM2837

Author: ALTracer

src/target/adi.c

@@ -128,6 +128,7 @@ static const arm_coresight_component_s arm_component_lut[] = {
 	{0x955, 0x00, 0, aa_nosupport, cidc_unknown,
 		ARM_COMPONENT_STR("CoreSight Component", "(unidentified Cortex-A5 component)")},
 	{0x956, 0x13, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Cortex-A7 ETM", "(Embedded Trace)")},
+	{0x95d, 0x13, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Cortex-A53 ETM", "(Embedded Trace)")},
 	{0x95f, 0x00, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Cortex-A15 PTM", "(Program Trace Macrocell)")},
 	{0x961, 0x32, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("CoreSight TMC", "(Trace Memory Controller)")},
 	{0x961, 0x21, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("CoreSight TMC", "(Trace Buffer)")},
@@ -140,14 +141,18 @@ static const arm_coresight_component_s arm_component_lut[] = {
 	{0x9a9, 0x11, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Cortex-M7 TPIU", "(Trace Port Interface Unit)")},
 	{0x9a5, 0x13, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Cortex-A5 ETM", "(Embedded Trace)")},
 	{0x9a7, 0x16, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Cortex-A7 PMU", "(Performance Monitor Unit)")},
+	{0x9a8, 0x14, 0x1a14, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Cortex-A53 CTI", "(Cross Trigger)")},
 	{0x9af, 0x16, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Cortex-A15 PMU", "(Performance Monitor Unit)")},
+	{0x9d3, 0x16, 0x2a16, aa_nosupport, cidc_unknown,
+		ARM_COMPONENT_STR("Cortex-A53 PMU", "(Performance Monitor Unit)")},
 	{0xc05, 0x15, 0, aa_cortexa, cidc_dc, ARM_COMPONENT_STR("Cortex-A5", "(Debug Unit)")},
 	{0xc07, 0x15, 0, aa_cortexa, cidc_dc, ARM_COMPONENT_STR("Cortex-A7", "(Debug Unit)")},
 	{0xc08, 0x15, 0, aa_cortexa, cidc_dc, ARM_COMPONENT_STR("Cortex-A8", "(Debug Unit)")},
 	{0xc09, 0x15, 0, aa_cortexa, cidc_dc, ARM_COMPONENT_STR("Cortex-A9", "(Debug Unit)")},
 	{0xc0f, 0x15, 0, aa_cortexa, cidc_unknown, ARM_COMPONENT_STR("Cortex-A15", "(Debug Unit)")},
 	{0xc14, 0x15, 0, aa_cortexr, cidc_unknown, ARM_COMPONENT_STR("Cortex-R4", "(Debug Unit)")},
 	{0xcd0, 0x00, 0, aa_nosupport, cidc_unknown, ARM_COMPONENT_STR("Atmel DSU", "(Device Service Unit)")},
+	{0xd03, 0x15, 0x6a15, aa_cortexa, cidc_dc, ARM_COMPONENT_STR("Cortex-A53", "(Debug Unit)")},
 	{0xd05, 0x13, 0x4a13, aa_nosupport, cidc_dc, ARM_COMPONENT_STR("Cortex-A55 ETM", "(Embedded Trace)")},
 	{0xd05, 0x14, 0x1a14, aa_nosupport, cidc_dc, ARM_COMPONENT_STR("Cortex-A55 CTI", "(Cross Trigger)")},
 	{0xd05, 0x15, 0x8a15, aa_cortexa, cidc_dc, ARM_COMPONENT_STR("Cortex-A55", "(Debug Unit)")},

src/target/cortex.c

@@ -103,6 +103,9 @@ void cortex_read_cpuid(target_s *const target)
 	case CORTEX_A9:
 		target->core = "A9";
 		break;
+	case CORTEX_A53:
+		target->core = "A53";
+		break;
 	case CORTEX_A55:
 		target->core = "A55";
 		break;

src/target/cortex.h

@@ -62,6 +62,7 @@
 #define CORTEX_A9  0xc090U
 #define CORTEX_A55 0xd050U
 
+#define CORTEX_A53 0xd030U
 #define CORTEX_A55 0xd050U
 
 /* Cortex general purpose register offsets */