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joevtdingusdev
joevt
authored and
dingusdev
committed
macio: Log unsupported DMA channels once.
For debugging. No need to spam the log.
1 parent 83066bb commit 20e7dfb

4 files changed

Lines changed: 90 additions & 9 deletions

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‎devices/ioctrl/grandcentral.cpp‎

Lines changed: 27 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -172,6 +172,23 @@ void GrandCentral::notify_bar_change(int bar_num)
172172
}
173173
}
174174

175+
static const char *get_name_dma(unsigned dma_channel) {
176+
switch (dma_channel) {
177+
case MIO_GC_DMA_SCSI_CURIO : return "DMA_SCSI_CURIO" ;
178+
case MIO_GC_DMA_FLOPPY : return "DMA_FLOPPY" ;
179+
case MIO_GC_DMA_ETH_XMIT : return "DMA_ETH_XMIT" ;
180+
case MIO_GC_DMA_ETH_RCV : return "DMA_ETH_RCV" ;
181+
case MIO_GC_DMA_ESCC_A_XMIT : return "DMA_ESCC_A_XMIT";
182+
case MIO_GC_DMA_ESCC_A_RCV : return "DMA_ESCC_A_RCV" ;
183+
case MIO_GC_DMA_ESCC_B_XMIT : return "DMA_ESCC_B_XMIT";
184+
case MIO_GC_DMA_ESCC_B_RCV : return "DMA_ESCC_B_RCV" ;
185+
case MIO_GC_DMA_AUDIO_OUT : return "DMA_AUDIO_OUT" ;
186+
case MIO_GC_DMA_AUDIO_IN : return "DMA_AUDIO_IN" ;
187+
case MIO_GC_DMA_SCSI_MESH : return "DMA_SCSI_MESH" ;
188+
default : return "unknown" ;
189+
}
190+
}
191+
175192
// The first 3 bytes of a MAC address is an OUI for "Apple, Inc."
176193
// A MAC address cannot begin with 0x10 because that will get bit-flipped to 0x08.
177194
// A MAC address that begins with 0x08 can be stored as bit-flipped or not bit-flipped.
@@ -277,8 +294,11 @@ uint32_t GrandCentral::read(uint32_t rgn_start, uint32_t offset, int size)
277294
}
278295
// fallthrough
279296
default:
280-
LOG_F(WARNING, "%s: unimplemented DMA register at 0x%X",
281-
this->name.c_str(), this->base_addr + offset);
297+
if (!(unsupported_dma_channel_read & (1 << dma_channel))) {
298+
unsupported_dma_channel_read |= (1 << dma_channel);
299+
LOG_F(WARNING, "%s: Unsupported DMA channel %d %s read @%02x.%c", this->name.c_str(),
300+
dma_channel, get_name_dma(dma_channel), offset & 0xFF, SIZE_ARG(size));
301+
}
282302
}
283303
} else { // Interrupt related registers
284304
switch (offset) {
@@ -411,8 +431,11 @@ void GrandCentral::write(uint32_t rgn_start, uint32_t offset, uint32_t value, in
411431
}
412432
// fallthrough
413433
default:
414-
LOG_F(WARNING, "%s: unimplemented DMA register at 0x%X",
415-
this->name.c_str(), this->base_addr + offset);
434+
if (!(unsupported_dma_channel_write & (1 << dma_channel))) {
435+
unsupported_dma_channel_write |= (1 << dma_channel);
436+
LOG_F(WARNING, "%s: Unsupported DMA channel %d %s write @%02x.%c = %0*x", this->name.c_str(),
437+
dma_channel, get_name_dma(dma_channel), offset & 0xFF, SIZE_ARG(size), size * 2, value);
438+
}
416439
}
417440
} else { // Interrupt related registers
418441
switch (offset) {

‎devices/ioctrl/heathrow.cpp‎

Lines changed: 32 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,24 @@ HeathrowIC::HeathrowIC() : PCIDevice("mac-io_heathrow"), InterruptCtrl()
106106
this->emmo_pin = GET_BIN_PROP("emmo") ^ 1;
107107
}
108108

109+
static const char *get_name_dma(unsigned dma_channel) {
110+
switch (dma_channel) {
111+
case MIO_OHARE_DMA_MESH : return "DMA_MESH" ;
112+
case MIO_OHARE_DMA_FLOPPY : return "DMA_FLOPPY" ;
113+
case MIO_OHARE_DMA_ETH_XMIT : return "DMA_ETH_XMIT" ;
114+
case MIO_OHARE_DMA_ETH_RCV : return "DMA_ETH_RCV" ;
115+
case MIO_OHARE_DMA_ESCC_A_XMIT : return "DMA_ESCC_A_XMIT";
116+
case MIO_OHARE_DMA_ESCC_A_RCV : return "DMA_ESCC_A_RCV" ;
117+
case MIO_OHARE_DMA_ESCC_B_XMIT : return "DMA_ESCC_B_XMIT";
118+
case MIO_OHARE_DMA_ESCC_B_RCV : return "DMA_ESCC_B_RCV" ;
119+
case MIO_OHARE_DMA_AUDIO_OUT : return "DMA_AUDIO_OUT" ;
120+
case MIO_OHARE_DMA_AUDIO_IN : return "DMA_AUDIO_IN" ;
121+
case MIO_OHARE_DMA_IDE0 : return "DMA_IDE0" ;
122+
case MIO_OHARE_DMA_IDE1 : return "DMA_IDE1" ;
123+
default : return "unknown" ;
124+
}
125+
}
126+
109127
void HeathrowIC::set_media_bay_id(uint8_t id) {
110128
this->mb_id = id;
111129
}
@@ -126,7 +144,8 @@ void HeathrowIC::notify_bar_change(int bar_num)
126144
}
127145

128146
uint32_t HeathrowIC::dma_read(uint32_t offset, int size) {
129-
switch (offset >> 8) {
147+
int dma_channel = offset >> 8;
148+
switch (dma_channel) {
130149
case MIO_OHARE_DMA_MESH:
131150
if (this->mesh_dma)
132151
return this->mesh_dma->reg_read(offset & 0xFF, size);
@@ -143,14 +162,19 @@ uint32_t HeathrowIC::dma_read(uint32_t offset, int size) {
143162
case MIO_OHARE_DMA_AUDIO_OUT:
144163
return this->snd_out_dma->reg_read(offset & 0xFF, size);
145164
default:
146-
LOG_F(WARNING, "Unsupported DMA channel read, offset=0x%X", offset);
165+
if (!(unsupported_dma_channel_read & (1 << dma_channel))) {
166+
unsupported_dma_channel_read |= (1 << dma_channel);
167+
LOG_F(WARNING, "%s: Unsupported DMA channel %d %s read @%02x.%c", this->name.c_str(),
168+
dma_channel, get_name_dma(dma_channel), offset & 0xFF, SIZE_ARG(size));
169+
}
147170
}
148171

149172
return 0;
150173
}
151174

152175
void HeathrowIC::dma_write(uint32_t offset, uint32_t value, int size) {
153-
switch (offset >> 8) {
176+
int dma_channel = offset >> 8;
177+
switch (dma_channel) {
154178
case MIO_OHARE_DMA_MESH:
155179
if (this->mesh_dma) this->mesh_dma->reg_write(offset & 0xFF, value, size);
156180
break;
@@ -170,7 +194,11 @@ void HeathrowIC::dma_write(uint32_t offset, uint32_t value, int size) {
170194
this->snd_out_dma->reg_write(offset & 0xFF, value, size);
171195
break;
172196
default:
173-
LOG_F(WARNING, "Unsupported DMA channel write, offset=0x%X, val=0x%X", offset, value);
197+
if (!(unsupported_dma_channel_write & (1 << dma_channel))) {
198+
unsupported_dma_channel_write |= (1 << dma_channel);
199+
LOG_F(WARNING, "%s: Unsupported DMA channel %d %s write @%02x.%c = %0*x", this->name.c_str(),
200+
dma_channel, get_name_dma(dma_channel), offset & 0xFF, SIZE_ARG(size), size * 2, value);
201+
}
174202
}
175203
}
176204

‎devices/ioctrl/macio.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -201,6 +201,9 @@ class GrandCentral : public PCIDevice, public InterruptCtrl {
201201
std::unique_ptr<DMAChannel> escc_a_rx_dma;
202202
std::unique_ptr<DMAChannel> escc_b_tx_dma;
203203
std::unique_ptr<DMAChannel> escc_b_rx_dma;
204+
205+
uint16_t unsupported_dma_channel_read = 0;
206+
uint16_t unsupported_dma_channel_write = 0;
204207
};
205208

206209
class OHare : public PCIDevice, public InterruptCtrl {
@@ -432,6 +435,9 @@ class HeathrowIC : public PCIDevice, public InterruptCtrl {
432435
std::unique_ptr<DMAChannel> enet_rcv_dma;
433436
std::unique_ptr<DMAChannel> escc_b_rcv_dma;
434437
std::unique_ptr<DMAChannel> snd_out_dma;
438+
439+
uint16_t unsupported_dma_channel_read = 0;
440+
uint16_t unsupported_dma_channel_write = 0;
435441
};
436442

437443
#endif /* MACIO_H */

‎devices/ioctrl/ohare.cpp‎

Lines changed: 25 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,24 @@ OHare::OHare() : PCIDevice("mac-io_ohare"), InterruptCtrl()
106106
//this->emmo_pin = GET_BIN_PROP("emmo") ^ 1;
107107
}
108108

109+
static const char *get_name_dma(unsigned dma_channel) {
110+
switch (dma_channel) {
111+
case MIO_OHARE_DMA_MESH : return "DMA_MESH" ;
112+
case MIO_OHARE_DMA_FLOPPY : return "DMA_FLOPPY" ;
113+
case MIO_OHARE_DMA_ETH_XMIT : return "DMA_ETH_XMIT" ;
114+
case MIO_OHARE_DMA_ETH_RCV : return "DMA_ETH_RCV" ;
115+
case MIO_OHARE_DMA_ESCC_A_XMIT : return "DMA_ESCC_A_XMIT";
116+
case MIO_OHARE_DMA_ESCC_A_RCV : return "DMA_ESCC_A_RCV" ;
117+
case MIO_OHARE_DMA_ESCC_B_XMIT : return "DMA_ESCC_B_XMIT";
118+
case MIO_OHARE_DMA_ESCC_B_RCV : return "DMA_ESCC_B_RCV" ;
119+
case MIO_OHARE_DMA_AUDIO_OUT : return "DMA_AUDIO_OUT" ;
120+
case MIO_OHARE_DMA_AUDIO_IN : return "DMA_AUDIO_IN" ;
121+
case MIO_OHARE_DMA_IDE0 : return "DMA_IDE0" ;
122+
case MIO_OHARE_DMA_IDE1 : return "DMA_IDE1" ;
123+
default : return "unknown" ;
124+
}
125+
}
126+
109127
void OHare::notify_bar_change(int bar_num)
110128
{
111129
if (bar_num) // only BAR0 is supported
@@ -320,6 +338,8 @@ uint32_t OHare::dma_read(uint32_t offset, int size)
320338
default:
321339
if (!(unsupported_dma_channel_read & (1 << dma_channel))) {
322340
unsupported_dma_channel_read |= (1 << dma_channel);
341+
LOG_F(WARNING, "%s: Unsupported DMA channel %d %s read @%02x.%c", this->name.c_str(),
342+
dma_channel, get_name_dma(dma_channel), offset & 0xFF, SIZE_ARG(size));
323343
return 0;
324344
}
325345
value = 0;
@@ -342,7 +362,11 @@ void OHare::dma_write(uint32_t offset, uint32_t value, int size)
342362
this->snd_out_dma->reg_write(offset & 0xFF, value, size);
343363
break;
344364
default:
345-
LOG_F(WARNING, "OHare: unsupported DMA channel write, offset=0x%X, val=0x%X", offset, value);
365+
if (!(unsupported_dma_channel_write & (1 << dma_channel))) {
366+
unsupported_dma_channel_write |= (1 << dma_channel);
367+
LOG_F(WARNING, "%s: Unsupported DMA channel %d %s write @%02x.%c = %0*x", this->name.c_str(),
368+
dma_channel, get_name_dma(dma_channel), offset & 0xFF, SIZE_ARG(size), size * 2, value);
369+
}
346370
}
347371
}
348372

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