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dts: r4pro: update to 6.18 state with eth-mux
1 parent 6e571e6 commit 2124980

1 file changed

Lines changed: 25 additions & 44 deletions

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arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro-8x.dts

Lines changed: 25 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -3,28 +3,30 @@
33
/ {
44
model = "Bananapi BPI-R4";
55
compatible = "bananapi,bpi-r4-pro-8x",
6+
"bananapi,bpi-r4-pro",
67
"mediatek,mt7988a";
78
};
8-
//not checked changes:
9-
// 2,3,
9+
1010
&eth {
1111
mux: mux-bus {
1212
#address-cells = <1>;
1313
#size-cells = <0>;
1414
mux1: ethernet-mux@1 {
1515
compatible = "mediatek,eth-mux";
16-
reg = <1>;
16+
reg = <1>; //map to gmac1
1717
chan-sel-gpios = <&pio 3 GPIO_ACTIVE_HIGH>;
1818
mod-def0-gpios = <&pio 1 GPIO_ACTIVE_LOW>; //also moddef0 of sfp2
1919
sfp-present-channel = <1>;
2020
#address-cells = <1>;
2121
#size-cells = <0>;
22+
2223
channel_10: channel@0 {
2324
reg = <0>;
2425
phy-mode = "10gbase-r";
2526
phy-connection-type = "10gbase-r";
2627
phy-handle = <&phy28>;
2728
};
29+
2830
channel_11: channel@1 {
2931
reg = <1>;
3032
phy-mode = "10gbase-r";
@@ -33,46 +35,22 @@
3335
sfp = <&sfp2>;
3436
};
3537
};
36-
/*mux2: ethernet-mux@2 {
37-
compatible = "mediatek,eth-mux";
38-
reg = <2>;
39-
chan-sel-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
40-
mod-def0-gpios = <&pio 4 GPIO_ACTIVE_LOW>;
41-
sfp-present-channel = <0>;
42-
#address-cells = <1>;
43-
#size-cells = <0>;
44-
channel_20: channel@0 {
45-
reg = <0>;
46-
phy-mode = "10gbase-r";
47-
phy-connection-type = "10gbase-r";
48-
managed = "in-band-status";
49-
sfp = <&sfp1>;
50-
};
51-
channel_21: channel@1 {
52-
reg = <1>;
53-
phy-mode = "usxgmii";
54-
phy-connection-type = "usxgmii";
55-
phy-handle = <&phy24>;
56-
};
57-
};*/
5838
};
5939
};
6040

6141
&gmac1 {
62-
phy-mode = "10gbase-r";
63-
phy-connection-type = "10gbase-r";
64-
phy = <&phy28>;
42+
phy-mode = "usxgmii";
43+
phy-connection-type = "usxgmii";
44+
phy-handle = <&phy28>;
6545
status = "okay";
6646
};
6747

6848
&mdio_bus {
69-
clock-frequency = <12500000>; //for faster fw download to 10G phys
49+
/* external Airoha AN8831X connected to MXL switch */
7050

71-
/* external Airoha AN8831X is connected to Mxl 2.5G switch */
7251
phy24: ethernet-phy@24 {
7352
reg = <24>;
7453
compatible = "ethernet-phy-ieee802.3-c45";
75-
//reset-gpios = <&pca9555 12 GPIO_ACTIVE_LOW>;
7654
reset-gpios = <&pio 83 GPIO_ACTIVE_LOW>; //change 5
7755
reset-assert-us = <200000>;
7856
reset-deassert-us = <350000>;
@@ -82,14 +60,14 @@
8260
#address-cells = <1>;
8361
#size-cells = <0>;
8462

85-
phy24_led0: an8831x_phy24_led0@0 {
63+
phy24_led0: led@0 {
8664
reg = <0>;
8765
linux,default-trigger = "netdev";
8866
active-high;
8967
status = "okay";
9068
};
9169

92-
phy24_led1: an8831x_phy24_led1@1 {
70+
phy24_led1: led@1 {
9371
reg = <1>;
9472
linux,default-trigger = "netdev";
9573
active-high;
@@ -102,8 +80,7 @@
10280
phy28: ethernet-phy@28 {
10381
reg = <28>;
10482
compatible = "ethernet-phy-ieee802.3-c45";
105-
//reset-gpios = <&pca9555 13 GPIO_ACTIVE_LOW>;
106-
reset-gpios = <&pio 82 GPIO_ACTIVE_LOW>; //change 5
83+
reset-gpios = <&pio 82 GPIO_ACTIVE_LOW>;
10784
reset-assert-us = <200000>;
10885
reset-deassert-us = <350000>;
10986
firmware-name = "aeonsemi/as21x1x_fw.bin";
@@ -112,14 +89,14 @@
11289
#address-cells = <1>;
11390
#size-cells = <0>;
11491

115-
phy28_led0: an8831x_phy28_led0@0 {
92+
phy28_led0: led@0 {
11693
reg = <0>;
11794
linux,default-trigger = "netdev";
11895
active-high;
11996
status = "okay";
12097
};
12198

122-
phy28_led1: an8831x_phy28_led1@1 {
99+
phy28_led1: led@1 {
123100
reg = <1>;
124101
linux,default-trigger = "netdev";
125102
active-high;
@@ -130,18 +107,23 @@
130107
};
131108

132109
&switch16 {
133-
/*ds_mux: ds-mux-bus {
110+
ds_mux: ds-mux-bus {
111+
#address-cells = <1>;
112+
#size-cells = <0>;
113+
134114
ds_mux0: ds-mux@0 {
135115
compatible = "mxl862xx,ds-mux";
136116
reg = <12>;
137117
chan-sel-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
138118
mod-def0-gpios = <&pio 4 GPIO_ACTIVE_LOW>;
139119
sfp-present-channel = <0>;
120+
#address-cells = <1>;
121+
#size-cells = <0>;
140122

141123
ds_channel_0: channel@0 {
142124
reg = <0>;
143-
phy-mode = "10gbase-r";
144-
phy-connection-type = "10gbase-r";
125+
phy-mode = "usxgmii";
126+
phy-connection-type = "usxgmii";
145127
managed = "in-band-status";
146128
sfp = <&sfp1>;
147129
};
@@ -153,10 +135,9 @@
153135
phy-handle = <&phy24>;
154136
};
155137
};
156-
};*/
157-
138+
};
158139
ports {
159-
/*port6: port@6 {
140+
port6: port@6 {
160141
reg = <12>;
161142
label = "mxl_lan5";
162143
phy-mode = "usxgmii";
@@ -167,7 +148,7 @@
167148
speed = <10000>;
168149
full-duplex;
169150
};
170-
};*/
151+
};
171152

172153
};
173154
};

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