1717struct mtk_clk_gate {
1818 struct clk_hw hw ;
1919 struct regmap * regmap ;
20- int set_ofs ;
21- int clr_ofs ;
22- int sta_ofs ;
23- u8 bit ;
20+ const struct mtk_gate * gate ;
2421};
2522
2623static inline struct mtk_clk_gate * to_mtk_clk_gate (struct clk_hw * hw )
@@ -33,9 +30,9 @@ static u32 mtk_get_clockgating(struct clk_hw *hw)
3330 struct mtk_clk_gate * cg = to_mtk_clk_gate (hw );
3431 u32 val ;
3532
36- regmap_read (cg -> regmap , cg -> sta_ofs , & val );
33+ regmap_read (cg -> regmap , cg -> gate -> regs -> sta_ofs , & val );
3734
38- return val & BIT (cg -> bit );
35+ return val & BIT (cg -> gate -> shift );
3936}
4037
4138static int mtk_cg_bit_is_cleared (struct clk_hw * hw )
@@ -52,28 +49,30 @@ static void mtk_cg_set_bit(struct clk_hw *hw)
5249{
5350 struct mtk_clk_gate * cg = to_mtk_clk_gate (hw );
5451
55- regmap_write (cg -> regmap , cg -> set_ofs , BIT (cg -> bit ));
52+ regmap_write (cg -> regmap , cg -> gate -> regs -> set_ofs , BIT (cg -> gate -> shift ));
5653}
5754
5855static void mtk_cg_clr_bit (struct clk_hw * hw )
5956{
6057 struct mtk_clk_gate * cg = to_mtk_clk_gate (hw );
6158
62- regmap_write (cg -> regmap , cg -> clr_ofs , BIT (cg -> bit ));
59+ regmap_write (cg -> regmap , cg -> gate -> regs -> clr_ofs , BIT (cg -> gate -> shift ));
6360}
6461
6562static void mtk_cg_set_bit_no_setclr (struct clk_hw * hw )
6663{
6764 struct mtk_clk_gate * cg = to_mtk_clk_gate (hw );
6865
69- regmap_set_bits (cg -> regmap , cg -> sta_ofs , BIT (cg -> bit ));
66+ regmap_set_bits (cg -> regmap , cg -> gate -> regs -> sta_ofs ,
67+ BIT (cg -> gate -> shift ));
7068}
7169
7270static void mtk_cg_clr_bit_no_setclr (struct clk_hw * hw )
7371{
7472 struct mtk_clk_gate * cg = to_mtk_clk_gate (hw );
7573
76- regmap_clear_bits (cg -> regmap , cg -> sta_ofs , BIT (cg -> bit ));
74+ regmap_clear_bits (cg -> regmap , cg -> gate -> regs -> sta_ofs ,
75+ BIT (cg -> gate -> shift ));
7776}
7877
7978static int mtk_cg_enable (struct clk_hw * hw )
@@ -152,12 +151,9 @@ const struct clk_ops mtk_clk_gate_ops_no_setclr_inv = {
152151};
153152EXPORT_SYMBOL_GPL (mtk_clk_gate_ops_no_setclr_inv );
154153
155- static struct clk_hw * mtk_clk_register_gate (struct device * dev , const char * name ,
156- const char * parent_name ,
157- struct regmap * regmap , int set_ofs ,
158- int clr_ofs , int sta_ofs , u8 bit ,
159- const struct clk_ops * ops ,
160- unsigned long flags )
154+ static struct clk_hw * mtk_clk_register_gate (struct device * dev ,
155+ const struct mtk_gate * gate ,
156+ struct regmap * regmap )
161157{
162158 struct mtk_clk_gate * cg ;
163159 int ret ;
@@ -167,18 +163,14 @@ static struct clk_hw *mtk_clk_register_gate(struct device *dev, const char *name
167163 if (!cg )
168164 return ERR_PTR (- ENOMEM );
169165
170- init .name = name ;
171- init .flags = flags | CLK_SET_RATE_PARENT ;
172- init .parent_names = parent_name ? & parent_name : NULL ;
173- init .num_parents = parent_name ? 1 : 0 ;
174- init .ops = ops ;
166+ init .name = gate -> name ;
167+ init .flags = gate -> flags | CLK_SET_RATE_PARENT ;
168+ init .parent_names = gate -> parent_name ? & gate -> parent_name : NULL ;
169+ init .num_parents = gate -> parent_name ? 1 : 0 ;
170+ init .ops = gate -> ops ;
175171
176172 cg -> regmap = regmap ;
177- cg -> set_ofs = set_ofs ;
178- cg -> clr_ofs = clr_ofs ;
179- cg -> sta_ofs = sta_ofs ;
180- cg -> bit = bit ;
181-
173+ cg -> gate = gate ;
182174 cg -> hw .init = & init ;
183175
184176 ret = clk_hw_register (dev , & cg -> hw );
@@ -228,13 +220,7 @@ int mtk_clk_register_gates(struct device *dev, struct device_node *node,
228220 continue ;
229221 }
230222
231- hw = mtk_clk_register_gate (dev , gate -> name , gate -> parent_name ,
232- regmap ,
233- gate -> regs -> set_ofs ,
234- gate -> regs -> clr_ofs ,
235- gate -> regs -> sta_ofs ,
236- gate -> shift , gate -> ops ,
237- gate -> flags );
223+ hw = mtk_clk_register_gate (dev , gate , regmap );
238224
239225 if (IS_ERR (hw )) {
240226 pr_err ("Failed to register clk %s: %pe\n" , gate -> name ,
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