net: pcs: mtk-lynxi: add individual polarity control

The user can add the following property to the sgmiisys node of the DTS
to control the SGMII PN polarity.
  - mediatek,pnswap: Swap TX and RX PN polarity
  - mediatek,pnswap-tx: Swap TX PN polarity
  - mediatek,pnswap-rx: Swap RX PN polarity

Without this patch, the TX/RX polarity of the SGMII cannot be controlled
individually.

Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>

Author: bcchen28411

drivers/net/dsa/mt7530-mdio.c

@@ -114,7 +114,8 @@ mt7531_create_sgmii(struct mt7530_priv *priv)
 			break;
 		}
 		pcs = mtk_pcs_lynxi_create(priv->dev, regmap,
-					   MT7531_PHYA_CTRL_SIGNAL3, 0);
+					   MT7531_PHYA_CTRL_SIGNAL3,
+					   MTK_SGMII_FLAG_PN_SWAP_TX);
 		if (!pcs) {
 			ret = -ENXIO;
 			break;

drivers/net/ethernet/mediatek/mtk_eth_soc.c

@@ -5324,7 +5324,11 @@ static int mtk_sgmii_init(struct mtk_eth *eth)
 		regmap = syscon_node_to_regmap(np);
 		flags = 0;
 		if (of_property_read_bool(np, "mediatek,pnswap"))
-			flags |= MTK_SGMII_FLAG_PN_SWAP;
+			flags |= MTK_SGMII_FLAG_PN_SWAP_TX | MTK_SGMII_FLAG_PN_SWAP_RX;
+		else if (of_property_read_bool(np, "mediatek,pnswap-tx"))
+			flags |= MTK_SGMII_FLAG_PN_SWAP_TX;
+		else if (of_property_read_bool(np, "mediatek,pnswap-rx"))
+			flags |= MTK_SGMII_FLAG_PN_SWAP_RX;
 
 		of_node_put(np);
 

drivers/net/pcs/pcs-mtk-lynxi.c

@@ -72,7 +72,8 @@
 /* Register to QPHY wrapper control */
 #define SGMSYS_QPHY_WRAP_CTRL		0xec
 #define SGMII_PN_SWAP_MASK		GENMASK(1, 0)
-#define SGMII_PN_SWAP_TX_RX		(BIT(0) | BIT(1))
+#define SGMII_PN_SWAP_RX		BIT(1)
+#define SGMII_PN_SWAP_TX		BIT(0)
 
 #define MTK_NETSYS_V3_AMA_RGC3		0x128
 
@@ -163,6 +164,7 @@ static int mtk_pcs_lynxi_config(struct phylink_pcs *pcs, unsigned int neg_mode,
 	struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs);
 	bool mode_changed = false, changed;
 	unsigned int rgc3, sgm_mode, bmcr;
+	unsigned int pnswap_tx, pnswap_rx;
 	int link_timer;
 
 	if (advertising) {
@@ -209,10 +211,14 @@ static int mtk_pcs_lynxi_config(struct phylink_pcs *pcs, unsigned int neg_mode,
 		regmap_set_bits(mpcs->regmap, SGMSYS_RESERVED_0,
 				SGMII_SW_RESET);
 
-		if (mpcs->flags & MTK_SGMII_FLAG_PN_SWAP)
-			regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_WRAP_CTRL,
-					   SGMII_PN_SWAP_MASK,
-					   SGMII_PN_SWAP_TX_RX);
+		/* Configure the interface polarity */
+		pnswap_tx = (mpcs->flags & MTK_SGMII_FLAG_PN_SWAP_TX) ?
+			    SGMII_PN_SWAP_TX : 0;
+		pnswap_rx = (mpcs->flags & MTK_SGMII_FLAG_PN_SWAP_RX) ?
+			    SGMII_PN_SWAP_RX : 0;
+		regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_WRAP_CTRL,
+				   SGMII_PN_SWAP_MASK,
+				   pnswap_tx | pnswap_rx);
 
 		if (interface == PHY_INTERFACE_MODE_2500BASEX)
 			rgc3 = SGMII_PHY_SPEED_3_125G;
@@ -433,7 +439,11 @@ static int mtk_pcs_lynxi_probe(struct platform_device *pdev)
 		return PTR_ERR(regmap);
 
 	if (of_property_read_bool(np->parent, "mediatek,pnswap"))
-		flags |= MTK_SGMII_FLAG_PN_SWAP;
+		flags |= MTK_SGMII_FLAG_PN_SWAP_TX | MTK_SGMII_FLAG_PN_SWAP_RX;
+	else if (of_property_read_bool(np->parent, "mediatek,pnswap-tx"))
+		flags |= MTK_SGMII_FLAG_PN_SWAP_TX;
+	else if (of_property_read_bool(np->parent, "mediatek,pnswap-rx"))
+		flags |= MTK_SGMII_FLAG_PN_SWAP_RX;
 
 	if (of_parse_phandle(np->parent, "resets", 0)) {
 		mpcs->rstc = of_reset_control_get_shared(np->parent, NULL);

include/linux/pcs/pcs-mtk-lynxi.h

@@ -5,7 +5,8 @@
 #include <linux/phylink.h>
 #include <linux/regmap.h>
 
-#define MTK_SGMII_FLAG_PN_SWAP BIT(0)
+#define MTK_SGMII_FLAG_PN_SWAP_TX BIT(0)
+#define MTK_SGMII_FLAG_PN_SWAP_RX BIT(1)
 struct phylink_pcs *mtk_pcs_lynxi_create(struct device *dev,
 					 struct regmap *regmap,
 					 u32 ana_rgc3, u32 flags);