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3 | 3 | * Copyright (C) 2022 MediaTek Inc. |
4 | 4 | * Author: Sam.Shih <sam.shih@mediatek.com> |
5 | 5 | */ |
| 6 | + |
6 | 7 | /dts-v1/; |
| 8 | + |
7 | 9 | #include "mt7988a.dtsi" |
8 | 10 | #include <dt-bindings/gpio/gpio.h> |
9 | 11 | #include <dt-bindings/input/input.h> |
10 | 12 | #include <dt-bindings/leds/common.h> |
11 | 13 | #include <dt-bindings/regulator/richtek,rt5190a-regulator.h> |
| 14 | + |
12 | 15 | /* |
13 | 16 | * ----------------------------------- Bananapi Bpi R4 Pro PINs --------------------------------- |
14 | 17 | * | | Function | Function | | |
|
28 | 31 | * | 25 | GND | GPIO52/PCM_DRX_I2S_DIN | 26 | |
29 | 32 | * |----|----------------------------------------|-----------------------------------------|----| |
30 | 33 | */ |
| 34 | + |
31 | 35 | / { |
32 | 36 | aliases { |
33 | 37 | ethernet0 = &gmac0; |
|
41 | 45 | i2c5 = &imux2_sfp2; |
42 | 46 | i2c6 = &imux3_wifi; |
43 | 47 | }; |
| 48 | + |
44 | 49 | chosen { |
45 | 50 | stdout-path = &serial0; |
46 | 51 | bootargs = "console=ttyS0,115200n1 loglevel=8 \ |
47 | 52 | earlycon=uart8250,mmio32,0x11000000 \ |
48 | 53 | pci=pcie_bus_perf ubi.block=0,firmware root=/dev/fit0 \ |
49 | 54 | rootwait"; |
50 | | - rootdisk-spim-nand = <&ubi_rootfs>; |
51 | 55 | }; |
52 | 56 |
|
53 | 57 | fan: pwm-fan { |
|
89 | 93 | default-state = "on"; |
90 | 94 | }; |
91 | 95 | }; |
| 96 | + |
92 | 97 | /*memory { |
93 | 98 | reg = <0x00 0x40000000 0x00 0x10000000>; |
94 | 99 | };*/ |
|
289 | 294 | pinctrl-names = "default"; |
290 | 295 | pinctrl-0 = <&i2c0_pins>; |
291 | 296 | status = "okay"; |
| 297 | + |
292 | 298 | rt5190a_64: rt5190a@64 { |
293 | 299 | compatible = "richtek,rt5190a"; |
294 | 300 | reg = <0x64>; |
295 | 301 | vin2-supply = <&rt5190_buck1>; |
296 | 302 | vin3-supply = <&rt5190_buck1>; |
297 | 303 | vin4-supply = <&rt5190_buck1>; |
| 304 | + |
298 | 305 | regulators { |
299 | 306 | rt5190_buck1: buck1 { |
300 | 307 | regulator-name = "rt5190a-buck1"; |
|
305 | 312 | regulator-boot-on; |
306 | 313 | regulator-always-on; |
307 | 314 | }; |
| 315 | + |
308 | 316 | buck2 { |
309 | 317 | regulator-name = "vcore"; |
310 | 318 | regulator-min-microvolt = <600000>; //0.85 in shematic |
311 | 319 | regulator-max-microvolt = <1400000>; |
312 | 320 | regulator-boot-on; |
313 | 321 | regulator-always-on; |
314 | 322 | }; |
| 323 | + |
315 | 324 | rt5190_buck3: buck3 { |
316 | 325 | regulator-name = "vproc"; |
317 | 326 | regulator-min-microvolt = <600000>; //0.85-1.0 |
318 | 327 | regulator-max-microvolt = <1400000>; |
319 | 328 | regulator-boot-on; |
320 | 329 | regulator-always-on; |
321 | 330 | }; |
| 331 | + |
322 | 332 | buck4 { |
323 | 333 | regulator-name = "rt5190a-buck4"; //1.8 |
324 | 334 | regulator-min-microvolt = <850000>; |
|
328 | 338 | regulator-boot-on; |
329 | 339 | regulator-always-on; |
330 | 340 | }; |
| 341 | + |
331 | 342 | ldo { |
332 | 343 | regulator-name = "rt5190a-ldo"; |
333 | 344 | regulator-min-microvolt = <1200000>; //1.8 |
|
519 | 530 | pinctrl-names = "default"; |
520 | 531 | pinctrl-0 = <&pcie0_pins>; |
521 | 532 | status = "okay"; |
522 | | - |
523 | | - /*slot0: pcie@0,0 { |
524 | | - #address-cells = <3>; |
525 | | - #size-cells = <2>; |
526 | | - |
527 | | - reg = <0x0000 0 0 0 0>; |
528 | | - mt7996@0,0 { |
529 | | - compatible = "mediatek,mt76"; |
530 | | - reg = <0x0000 0 0 0 0>; |
531 | | - device_type = "pci"; |
532 | | - //mediatek,mtd-eeprom = <&factory 0x0>; |
533 | | - }; |
534 | | - };*/ |
535 | 533 | }; |
536 | 534 |
|
537 | 535 | /* mPCIe (11310000 near leds) SIM3 */ |
|
672 | 670 | status = "okay"; |
673 | 671 | }; |
674 | 672 |
|
| 673 | +/* back USB */ |
675 | 674 | &ssusb0 { |
676 | 675 | /* Use U2P only instead of both U3P/U2P due to U3P serdes shared with pcie2 */ |
677 | 676 | phys = <&xphyu2port0 PHY_TYPE_USB2>; |
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