fix: escape $ in Makefile bench target for correct regex (#29)

Use ^$$ so Make passes literal ^$ to the shell, ensuring
go test -run matches no test names (benchmarks only).

Author: ankurs

Makefile

@@ -13,7 +13,7 @@ lint:
 	go tool govulncheck ./...
 
 bench:
-	go test -run=^$ -bench=. -benchmem ./...
+	go test -run=^$$ -bench=. -benchmem ./...
 
 doc:
 	go tool gomarkdoc --output '{{.Dir}}/README.md' ./...