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Merge pull request #3 from harp-tech/fw-raise_harp_core_to_1.13
Raise harp core to 1.13
2 parents d3fbf6a + 142236b commit d835bf6

11 files changed

Lines changed: 140 additions & 16 deletions

Firmware/LICENSE.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
Copyright (C) 2018 Filipe Carvalho
1+
Copyright (C) 2018-2023 Filipe Carvalho
22

33
Permission is hereby granted, free of charge, to any person obtaining a copy of
44
this firmware and associated documentation files (the "Firmware"), to deal in

Firmware/LoadCells.atsuo

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Firmware/LoadCells/LoadCells.cppproj

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,6 @@
8686
<avrgcccpp.linker.libraries.Libraries>
8787
<ListValues>
8888
<Value>libm</Value>
89-
<Value>libATxmega128A4U-1.4.a</Value>
9089
</ListValues>
9190
</avrgcccpp.linker.libraries.Libraries>
9291
<avrgcccpp.linker.libraries.LibrarySearchPaths>
@@ -133,12 +132,12 @@
133132
<avrgcccpp.linker.libraries.Libraries>
134133
<ListValues>
135134
<Value>libm</Value>
136-
<Value>libATxmega128A4U-1.4.a</Value>
135+
<Value>libATxmega128A4U-1.13.a</Value>
137136
</ListValues>
138137
</avrgcccpp.linker.libraries.Libraries>
139138
<avrgcccpp.linker.libraries.LibrarySearchPaths>
140139
<ListValues>
141-
<Value>C:\Users\Filipe Carvalho\Documents\BitBucket\Device.LoadCells\Firmware\LoadCells</Value>
140+
<Value>..</Value>
142141
</ListValues>
143142
</avrgcccpp.linker.libraries.LibrarySearchPaths>
144143
<avrgcccpp.assembler.debugging.DebugLevel>Default (-Wa,-g)</avrgcccpp.assembler.debugging.DebugLevel>

Firmware/LoadCells/app.c

Lines changed: 16 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ void hwbp_app_initialize(void)
2525
{
2626
/* Define versions */
2727
uint8_t hwH = 1;
28-
uint8_t hwL = 0;
28+
uint8_t hwL = 1;
2929
uint8_t fwH = 1;
3030
uint8_t fwL = 0;
3131
uint8_t ass = 0;
@@ -39,7 +39,10 @@ void hwbp_app_initialize(void)
3939
(uint8_t*)(&app_regs),
4040
APP_NBYTES_OF_REG_BANK,
4141
APP_REGS_ADD_MAX - APP_REGS_ADD_MIN + 1,
42-
default_device_name
42+
default_device_name,
43+
true, // The device is _not_ able to repeat the harp timestamp clock
44+
true, // The device is _not_ able to generate the harp timestamp clock
45+
3 // Default timestamp offset
4346
);
4447
}
4548

@@ -202,7 +205,9 @@ void update_offsets (uint8_t load_cell_channel)
202205
/************************************************************************/
203206
/* Initialization Callbacks */
204207
/************************************************************************/
205-
void core_callback_1st_config_hw_after_boot(void)
208+
void core_callback_define_clock_default(void) {}
209+
210+
void core_callback_initialize_hardware(void)
206211
{
207212
/* Initialize IOs */
208213
/* Don't delete this function!!! */
@@ -457,6 +462,14 @@ void core_callback_t_1ms(void)
457462
update_pots_on_port1();
458463
}
459464

465+
/************************************************************************/
466+
/* Callbacks: cloc control */
467+
/************************************************************************/
468+
void core_callback_clock_to_repeater(void) {}
469+
void core_callback_clock_to_generator(void) {}
470+
void core_callback_clock_to_unlock(void) {}
471+
void core_callback_clock_to_lock(void) {}
472+
460473
/************************************************************************/
461474
/* Callbacks: uart control */
462475
/************************************************************************/

Firmware/LoadCells/cpu.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -142,6 +142,8 @@ void timer_type1_wait(TC1_t* timer, uint8_t prescaler, uint16_t target_count);
142142
/************************************************************************/
143143
/* EEPROM */
144144
/************************************************************************/
145+
bool eeprom_is_busy(void);
146+
145147
uint8_t eeprom_rd_byte(uint16_t addr);
146148
void eeprom_wr_byte(uint16_t addr, uint8_t byte);
147149

@@ -171,6 +173,10 @@ int32_t eeprom_rd_i32(uint16_t addr);
171173
#define PRESCALER_ADC_DIV256 ADC_PRESCALER_DIV256_gc
172174
#define PRESCALER_ADC_DIV512 ADC_PRESCALER_DIV512_gc
173175

176+
void adc_A_initialize_single_ended(uint8_t analog_reference);
177+
int16_t adc_A_read_channel(uint8_t index);
178+
void adc_A_calibrate_offset(uint8_t index);
179+
174180
uint16_t adcA_unsigned_single_ended(ADC_t* adc, uint8_t res, uint8_t ref , uint8_t prescaler, uint8_t adc_pin, TC0_t* timer);
175181

176182
#endif /* _CPU_1V1_H_ */

Firmware/LoadCells/hwbp_core.h

Lines changed: 52 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18,9 +18,12 @@ typedef struct {
1818
uint16_t usecond;
1919
} timestamp_t;
2020

21+
// Used to define the clock direction default of the device.
22+
void core_callback_define_clock_default(void);
23+
2124
// It's the first callback used, right after booting the core.
2225
// The pins, ports and external hardware should be initialized.
23-
void core_callback_1st_config_hw_after_boot(void);
26+
void core_callback_initialize_hardware(void);
2427

2528
// Used to initialize the registers.
2629
// All registers should be written to their default state.
@@ -43,7 +46,6 @@ void core_callback_device_to_active(void);
4346
void core_callback_device_to_speed(void);
4447

4548

46-
4749
// Called before execute the timer interrupts
4850
void core_callback_t_before_exec(void);
4951
// Called after execute the timer interrupts
@@ -57,7 +59,6 @@ void core_callback_t_500us(void);
5759
void core_callback_t_new_second(void);
5860

5961

60-
6162
// Read from an application register.
6263
bool core_read_app_register(uint8_t add, uint8_t type);
6364
// Write to an application register.
@@ -68,6 +69,48 @@ bool hwbp_read_common_reg(uint8_t add, uint8_t type);
6869
bool hwbp_write_common_reg(uint8_t add, uint8_t type, uint8_t * content, uint16_t n_elements);
6970

7071

72+
/************************************************************************/
73+
/* Register RESET_APP */
74+
/************************************************************************/
75+
// Write to common register RESET_APP.
76+
bool hwbp_write_common_reg_RESET_APP(void *a);
77+
78+
// Used to save all registers to non-volatile memory
79+
bool core_save_all_registers_to_eeprom(void);
80+
81+
82+
/************************************************************************/
83+
/* Register CONFIG */
84+
/************************************************************************/
85+
// Write to common register CONFIG.
86+
bool hwbp_write_common_reg_CONFIG(void *a);
87+
// Read from common register CONFIG.
88+
void hwbp_read_common_reg_CONFIG(void);
89+
90+
// Called when the application should configure the hardware to repeat the harp timestamp clock input.
91+
void core_callback_clock_to_repeater(void);
92+
// Called when the application should configure the hardware to generate the harp timestamp clock.
93+
void core_callback_clock_to_generator(void);
94+
// Called when the timestamp lock is changed to unlocked.
95+
void core_callback_clock_to_unlock(void);
96+
// Called when the timestamp lock is changed to locked.
97+
void core_callback_clock_to_lock(void);
98+
99+
// Used to know if the device is repeating the harp timestamp clock
100+
bool core_bool_device_is_repeater(void);
101+
// Used to know if the device is generating the harp timestamp clock
102+
bool core_bool_device_is_generator(void);
103+
// Used to check if the timestamp register is locked
104+
bool core_bool_clock_is_locked(void);
105+
106+
// Used to set the device as a repeater
107+
bool core_device_to_clock_repeater(void);
108+
// Used to set the device as a generator
109+
bool core_device_to_clock_generator(void);
110+
// Used to lock the timestamp register
111+
bool core_clock_to_lock(void);
112+
// Used to unlock the timestamp register
113+
bool core_clock_to_unlock(void);
71114

72115

73116
// It is mandatory that this function is the first of the application code.
@@ -81,7 +124,11 @@ void core_func_start_core (
81124
uint8_t *pointer_to_app_regs,
82125
const uint16_t app_mem_size_to_save,
83126
const uint8_t num_of_app_registers,
84-
const uint8_t *device_name);
127+
const uint8_t *device_name,
128+
const bool device_is_able_to_repeat_clock,
129+
const bool device_is_able_to_generate_clock,
130+
const uint8_t default_timestamp_offset
131+
);
85132

86133
// Call this function in case of error
87134
// A power up or reset must be performed to remove the device from this state
@@ -113,6 +160,7 @@ uint16_t core_func_read_R_TIMESTAMP_MICRO(void);
113160

114161

115162

163+
116164
// Return "true" if the LEDs can be ON.
117165
bool core_bool_is_visual_enabled(void);
118166
// Return "true" if the device is in Speed Mode.

Firmware/LoadCells/hwbp_core_regs.h

Lines changed: 17 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -10,18 +10,21 @@
1010
#define ADD_R_HW_VERSION_H 0x01 // U8
1111
#define ADD_R_HW_VERSION_L 0x02 // U8
1212
#define ADD_R_ASSEMBLY_VERSION 0x03 // U8
13-
#define ADD_R_HARP_VERSION_H 0x04 // U8
14-
#define ADD_R_HARP_VERSION_L 0x05 // U8
13+
#define ADD_R_CORE_VERSION_H 0x04 // U8
14+
#define ADD_R_CORE_VERSION_L 0x05 // U8
1515
#define ADD_R_FW_VERSION_H 0x06 // U8
1616
#define ADD_R_FW_VERSION_L 0x07 // U8
1717
#define ADD_R_TIMESTAMP_SECOND 0x08 // U32
1818
#define ADD_R_TIMESTAMP_MICRO 0x09 // U16
1919
#define ADD_R_OPERATION_CTRL 0x0A // U8
2020
#define ADD_R_RESET_DEV 0x0B // U8
2121
#define ADD_R_DEVICE_NAME 0x0C // U8
22+
#define ADD_R_SERIAL_NUMBER 0x0D // U16
23+
#define ADD_R_CONFIG 0x0E // U8
24+
#define ADD_R_TIMESTAMP_OFFSET 0x0F // U8
2225

2326
/* Memory limits */
24-
#define COMMON_BANK_ADD_MAX 0x0C
27+
#define COMMON_BANK_ADD_MAX 0x0F
2528
#define COMMON_BANK_ABSOLUTE_ADD_MAX 0x1C
2629

2730
/* R_OPERATION_CTRL */
@@ -43,8 +46,19 @@
4346

4447
#define B_SAVE (1<<2)
4548

49+
#define B_NAME_TO_DEFAULT (1<<3)
50+
4651
#define B_BOOT_DEF (1<<6)
4752
#define B_BOOT_EE (1<<7)
4853

54+
/* ADD_R_CONFIG */
55+
#define B_CLK_REP (1<<0)
56+
#define B_CLK_GEN (1<<1)
57+
#define B_CLK_SAVE (1<<2)
58+
#define B_REP_ABLE (1<<3)
59+
#define B_GEN_ABLE (1<<4)
60+
#define B_CLK_UNLOCK (1<<6)
61+
#define B_CLK_LOCK (1<<7)
62+
4963

5064
#endif /* _HWBP_CORE_REGS_H_ */

Firmware/LoadCells/hwbp_core_types.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,9 +26,9 @@
2626
#define MSK_TIMESTAMP_AT_PAYLOAD 0x10
2727

2828
/************************************************************************/
29-
/* Maximum size of an entire packet (header to chksum) */
29+
/* Maximum size of a received packet */
3030
/************************************************************************/
31-
#define MAX_PACKET_SIZE 256
31+
#define MAX_PACKET_SIZE 255
3232

3333

3434
#endif /* _HWBP_CORE_TYPES_H_ */

Firmware/LoadCells/hwbp_sync.h

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,44 @@
1+
#ifndef _HWBP_SYNC_H_
2+
#define _HWBP_SYNC_H_
3+
#include <avr/io.h>
4+
5+
6+
/************************************************************************/
7+
/* Prototypes */
8+
/************************************************************************/
9+
void initialize_timestamp_uart (uint32_t * timestamp_pointer);
10+
void reset_sync_counter (void);
11+
void trigger_sync_timer (void);
12+
13+
14+
/************************************************************************/
15+
/* Reset sync counter */
16+
/************************************************************************/
17+
#if defined(__AVR_ATxmega16A4U__)
18+
#define RESET_TIMESTAMP_COUNTER reset_sync_counter()
19+
#else
20+
#define RESET_TIMESTAMP_COUNTER
21+
#endif
22+
23+
24+
/************************************************************************/
25+
/* Trigger timer */
26+
/************************************************************************/
27+
#if defined(__AVR_ATxmega16A4U__)
28+
#define SYNC_TRIGGER_TIMER trigger_sync_timer()
29+
#else
30+
#define SYNC_TRIGGER_TIMER
31+
#endif
32+
33+
34+
/************************************************************************/
35+
/* Control when the device lost sync */
36+
/************************************************************************/
37+
#if defined(__AVR_ATxmega16A4U__)
38+
#define INCREASE_LOST_SYNC_COUNTER
39+
#else
40+
#define INCREASE_LOST_SYNC_COUNTER device_lost_sync_counter++
41+
#endif
42+
43+
44+
#endif /* _HWBP_SYNC_H_ */
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