The ucf-to-xdc.sh script for Xilinx EDA-tools: that convert ISE-style to Vivado-style constraints (sdc → xdc)
Russian description available here: http://idoka.ru/my-fpga-and-asic-scripts/#_UCF_XDC
Just type:
./ucf-to-xdc.sh FILENAME.ucfthat produce the file FILENAME.xdc in current dir
NET "DDR_DQ[0]" LOC = "AY12" | IOSTANDARD = SSTL15_T_DCI | VCCAUX_IO = NORMAL | SLEW = FAST;
NET "DDR_DQ[1]" LOC = "AW12" | IOSTANDARD = SSTL15_T_DCI | VCCAUX_IO = NORMAL | SLEW = FAST;set_property PACKAGE_PIN AY12 [get_ports DDR_DQ[0]]
set_property IOSTANDARD SSTL15_T_DCI [get_ports DDR_DQ[0]]
set_property VCCAUX_IO NORMAL [get_ports DDR_DQ[0]]
set_property SLEW FAST [get_ports DDR_DQ[0]]
set_property PACKAGE_PIN AW12 [get_ports DDR_DQ[1]]
set_property IOSTANDARD SSTL15_T_DCI [get_ports DDR_DQ[1]]
set_property VCCAUX_IO NORMAL [get_ports DDR_DQ[1]]
set_property SLEW FAST [get_ports DDR_DQ[1]]sed command explanation:
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/^$/d- remove all empty strings -
s/[\"=|;]//g- remove any of these symbols:",=,|,; -
s/[\t]*//g- remove all horizontal tabulation symbol -
s/\ \{1,\}/\ /g- replace several whitespaces by one (i.e.:" "→" ") -
Formatting output string (parted by several string):
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s/NET[ ]\(.\)[ ]*.. - extract signal name -
..
LOC[ ]\([A-Z0-9]\)[ ]*.. - extract pin name -
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IOSTANDARD[ ]\([_A-Z0-9]\)[ ]*.. - extract IO-standard -
..
VCCAUX_IO[ ]\([A-Z]\)[ ]*.. - extract VCCAUX value -
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SLEW[ ]\([A-Z]\)/.. - extract slewrate -
..
set_property PACKAGE_PIN \2 \[get_ports \1\]\n.. - generate location constraint -
..
set_property IOSTANDARD \3 \[get_ports \1\]\n.. - generate IO-standard constraint -
..
set_property VCCAUX_IO \4 \[get_ports \1\]\n.. - generate VCCAUX value constraint -
..
set_property SLEW \5 \[get_ports \1\]\n\n/g- generate slew rate constraint
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a position independent parser of ucf
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move to new one-string format of xdc, like this:
set_property -dict {PACKAGE_PIN AY12 IOSTANDARD SSTL15_T_DCI VCCAUX_IO NORMAL SLEW FAST} [get_ports DDR_DQ[0]];