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Commit 46cd880

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HenryHRichHenryHRich
committed
Merge branch 'master' of jsoftware.com:jsource
2 parents ef987cd + ec216f7 commit 46cd880

4 files changed

Lines changed: 279 additions & 9 deletions

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‎jsrc/cpuinfo.c‎

Lines changed: 101 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
#endif
1111

1212
extern uint64_t g_cpuFeatures;
13+
extern uint64_t g_cpuFeatures2;
1314
extern int numberOfCores;
1415

1516
#if defined(__aarch32__)||defined(__arm__)||defined(_M_ARM)
@@ -18,6 +19,7 @@ uint32_t OPENSSL_armcap_P;
1819
void cpuInit(void)
1920
{
2021
g_cpuFeatures = 0;
22+
g_cpuFeatures2 = 0;
2123
OPENSSL_armcap_P = 0;
2224
numberOfCores=getNumberOfCores();
2325
}
@@ -35,10 +37,12 @@ uint32_t OPENSSL_armcap_P;
3537
void cpuInit(void)
3638
{
3739
g_cpuFeatures = 0;
40+
g_cpuFeatures2 = 0;
3841
numberOfCores=getNumberOfCores();
3942

4043
#if defined(__linux__)
4144
unsigned long hwcaps= getauxval(AT_HWCAP);
45+
unsigned long hwcaps2= getauxval(AT_HWCAP2);
4246

4347
#if defined(ANDROID)
4448
if(hwcaps & HWCAP_FP) g_cpuFeatures |= ARM_HWCAP_FP;
@@ -69,6 +73,46 @@ void cpuInit(void)
6973
if(hwcaps & HWCAP_USCAT) g_cpuFeatures |= ARM_HWCAP_USCAT;
7074
if(hwcaps & HWCAP_ILRCPC) g_cpuFeatures |= ARM_HWCAP_ILRCPC;
7175
if(hwcaps & HWCAP_FLAGM) g_cpuFeatures |= ARM_HWCAP_FLAGM;
76+
if(hwcaps & HWCAP_SSBS) g_cpuFeatures |= ARM_HWCAP_SSBS;
77+
if(hwcaps & HWCAP_SB) g_cpuFeatures |= ARM_HWCAP_SB;
78+
if(hwcaps & HWCAP_PACA) g_cpuFeatures |= ARM_HWCAP_PACA;
79+
if(hwcaps & HWCAP_PACG) g_cpuFeatures |= ARM_HWCAP_PACG;
80+
81+
if(hwcaps2 & HWCAP2_DCPODP) g_cpuFeatures2 |= ARM_HWCAP2_DCPODP;
82+
if(hwcaps2 & HWCAP2_SVE2) g_cpuFeatures2 |= ARM_HWCAP2_SVE2;
83+
if(hwcaps2 & HWCAP2_SVEAES) g_cpuFeatures2 |= ARM_HWCAP2_SVEAES;
84+
if(hwcaps2 & HWCAP2_SVEPMULL) g_cpuFeatures2 |= ARM_HWCAP2_SVEPMULL;
85+
if(hwcaps2 & HWCAP2_SVEBITPERM) g_cpuFeatures2 |= ARM_HWCAP2_SVEBITPERM;
86+
if(hwcaps2 & HWCAP2_SVESHA3) g_cpuFeatures2 |= ARM_HWCAP2_SVESHA3;
87+
if(hwcaps2 & HWCAP2_SVESM4) g_cpuFeatures2 |= ARM_HWCAP2_SVESM4;
88+
if(hwcaps2 & HWCAP2_FLAGM2) g_cpuFeatures2 |= ARM_HWCAP2_FLAGM2;
89+
if(hwcaps2 & HWCAP2_FRINT) g_cpuFeatures2 |= ARM_HWCAP2_FRINT;
90+
if(hwcaps2 & HWCAP2_SVEI8MM) g_cpuFeatures2 |= ARM_HWCAP2_SVEI8MM;
91+
if(hwcaps2 & HWCAP2_SVEF32MM) g_cpuFeatures2 |= ARM_HWCAP2_SVEF32MM;
92+
if(hwcaps2 & HWCAP2_SVEF64MM) g_cpuFeatures2 |= ARM_HWCAP2_SVEF64MM;
93+
if(hwcaps2 & HWCAP2_SVEBF16) g_cpuFeatures2 |= ARM_HWCAP2_SVEBF16;
94+
if(hwcaps2 & HWCAP2_I8MM) g_cpuFeatures2 |= ARM_HWCAP2_I8MM;
95+
if(hwcaps2 & HWCAP2_BF16) g_cpuFeatures2 |= ARM_HWCAP2_BF16;
96+
if(hwcaps2 & HWCAP2_DGH) g_cpuFeatures2 |= ARM_HWCAP2_DGH;
97+
if(hwcaps2 & HWCAP2_RNG) g_cpuFeatures2 |= ARM_HWCAP2_RNG;
98+
if(hwcaps2 & HWCAP2_BTI) g_cpuFeatures2 |= ARM_HWCAP2_BTI;
99+
if(hwcaps2 & HWCAP2_MTE) g_cpuFeatures2 |= ARM_HWCAP2_MTE;
100+
if(hwcaps2 & HWCAP2_ECV) g_cpuFeatures2 |= ARM_HWCAP2_ECV;
101+
if(hwcaps2 & HWCAP2_AFP) g_cpuFeatures2 |= ARM_HWCAP2_AFP;
102+
if(hwcaps2 & HWCAP2_RPRES) g_cpuFeatures2 |= ARM_HWCAP2_RPRES;
103+
if(hwcaps2 & HWCAP2_MTE3) g_cpuFeatures2 |= ARM_HWCAP2_MTE3;
104+
#if 0
105+
if(hwcaps2 & HWCAP2_SME) g_cpuFeatures2 |= ARM_HWCAP2_SME;
106+
if(hwcaps2 & HWCAP2_SME_I16I64) g_cpuFeatures2 |= ARM_HWCAP2_SME_I16I64;
107+
if(hwcaps2 & HWCAP2_SME_F64F64) g_cpuFeatures2 |= ARM_HWCAP2_SME_F64F64;
108+
if(hwcaps2 & HWCAP2_SME_I8I32) g_cpuFeatures2 |= ARM_HWCAP2_SME_I8I32;
109+
if(hwcaps2 & HWCAP2_SME_F16F32) g_cpuFeatures2 |= ARM_HWCAP2_SME_F16F32;
110+
if(hwcaps2 & HWCAP2_SME_B16F32) g_cpuFeatures2 |= ARM_HWCAP2_SME_B16F32;
111+
if(hwcaps2 & HWCAP2_SME_F32F32) g_cpuFeatures2 |= ARM_HWCAP2_SME_F32F32;
112+
if(hwcaps2 & HWCAP2_SME_FA64) g_cpuFeatures2 |= ARM_HWCAP2_SME_FA64;
113+
if(hwcaps2 & HWCAP2_WFXT) g_cpuFeatures2 |= ARM_HWCAP2_WFXT;
114+
if(hwcaps2 & HWCAP2_EBF16) g_cpuFeatures2 |= ARM_HWCAP2_EBF16;
115+
#endif
72116
#else
73117
// see <uapi/asm/hwcap.h> kernel header
74118
if(hwcaps & ARM_HWCAP_FP) g_cpuFeatures |= ARM_HWCAP_FP;
@@ -99,6 +143,43 @@ void cpuInit(void)
99143
if(hwcaps & ARM_HWCAP_USCAT) g_cpuFeatures |= ARM_HWCAP_USCAT;
100144
if(hwcaps & ARM_HWCAP_ILRCPC) g_cpuFeatures |= ARM_HWCAP_ILRCPC;
101145
if(hwcaps & ARM_HWCAP_FLAGM) g_cpuFeatures |= ARM_HWCAP_FLAGM;
146+
if(hwcaps & ARM_HWCAP_SSBS) g_cpuFeatures |= ARM_HWCAP_SSBS;
147+
if(hwcaps & ARM_HWCAP_SB) g_cpuFeatures |= ARM_HWCAP_SB;
148+
if(hwcaps & ARM_HWCAP_PACA) g_cpuFeatures |= ARM_HWCAP_PACA;
149+
150+
if(hwcaps2 & ARM_HWCAP2_DCPODP) g_cpuFeatures2 |= ARM_HWCAP2_DCPODP;
151+
if(hwcaps2 & ARM_HWCAP2_SVE2) g_cpuFeatures2 |= ARM_HWCAP2_SVE2;
152+
if(hwcaps2 & ARM_HWCAP2_SVEAES) g_cpuFeatures2 |= ARM_HWCAP2_SVEAES;
153+
if(hwcaps2 & ARM_HWCAP2_SVEPMULL) g_cpuFeatures2 |= ARM_HWCAP2_SVEPMULL;
154+
if(hwcaps2 & ARM_HWCAP2_SVEBITPERM) g_cpuFeatures2 |= ARM_HWCAP2_SVEBITPERM;
155+
if(hwcaps2 & ARM_HWCAP2_SVESHA3) g_cpuFeatures2 |= ARM_HWCAP2_SVESHA3;
156+
if(hwcaps2 & ARM_HWCAP2_SVESM4) g_cpuFeatures2 |= ARM_HWCAP2_SVESM4;
157+
if(hwcaps2 & ARM_HWCAP2_FLAGM2) g_cpuFeatures2 |= ARM_HWCAP2_FLAGM2;
158+
if(hwcaps2 & ARM_HWCAP2_FRINT) g_cpuFeatures2 |= ARM_HWCAP2_FRINT;
159+
if(hwcaps2 & ARM_HWCAP2_SVEI8MM) g_cpuFeatures2 |= ARM_HWCAP2_SVEI8MM;
160+
if(hwcaps2 & ARM_HWCAP2_SVEF32MM) g_cpuFeatures2 |= ARM_HWCAP2_SVEF32MM;
161+
if(hwcaps2 & ARM_HWCAP2_SVEF64MM) g_cpuFeatures2 |= ARM_HWCAP2_SVEF64MM;
162+
if(hwcaps2 & ARM_HWCAP2_SVEBF16) g_cpuFeatures2 |= ARM_HWCAP2_SVEBF16;
163+
if(hwcaps2 & ARM_HWCAP2_I8MM) g_cpuFeatures2 |= ARM_HWCAP2_I8MM;
164+
if(hwcaps2 & ARM_HWCAP2_BF16) g_cpuFeatures2 |= ARM_HWCAP2_BF16;
165+
if(hwcaps2 & ARM_HWCAP2_DGH) g_cpuFeatures2 |= ARM_HWCAP2_DGH;
166+
if(hwcaps2 & ARM_HWCAP2_RNG) g_cpuFeatures2 |= ARM_HWCAP2_RNG;
167+
if(hwcaps2 & ARM_HWCAP2_BTI) g_cpuFeatures2 |= ARM_HWCAP2_BTI;
168+
if(hwcaps2 & ARM_HWCAP2_MTE) g_cpuFeatures2 |= ARM_HWCAP2_MTE;
169+
if(hwcaps2 & ARM_HWCAP2_ECV) g_cpuFeatures2 |= ARM_HWCAP2_ECV;
170+
if(hwcaps2 & ARM_HWCAP2_AFP) g_cpuFeatures2 |= ARM_HWCAP2_AFP;
171+
if(hwcaps2 & ARM_HWCAP2_RPRES) g_cpuFeatures2 |= ARM_HWCAP2_RPRES;
172+
if(hwcaps2 & ARM_HWCAP2_MTE3) g_cpuFeatures2 |= ARM_HWCAP2_MTE3;
173+
if(hwcaps2 & ARM_HWCAP2_SME) g_cpuFeatures2 |= ARM_HWCAP2_SME;
174+
if(hwcaps2 & ARM_HWCAP2_SME_I16I64) g_cpuFeatures2 |= ARM_HWCAP2_SME_I16I64;
175+
if(hwcaps2 & ARM_HWCAP2_SME_F64F64) g_cpuFeatures2 |= ARM_HWCAP2_SME_F64F64;
176+
if(hwcaps2 & ARM_HWCAP2_SME_I8I32) g_cpuFeatures2 |= ARM_HWCAP2_SME_I8I32;
177+
if(hwcaps2 & ARM_HWCAP2_SME_F16F32) g_cpuFeatures2 |= ARM_HWCAP2_SME_F16F32;
178+
if(hwcaps2 & ARM_HWCAP2_SME_B16F32) g_cpuFeatures2 |= ARM_HWCAP2_SME_B16F32;
179+
if(hwcaps2 & ARM_HWCAP2_SME_F32F32) g_cpuFeatures2 |= ARM_HWCAP2_SME_F32F32;
180+
if(hwcaps2 & ARM_HWCAP2_SME_FA64) g_cpuFeatures2 |= ARM_HWCAP2_SME_FA64;
181+
if(hwcaps2 & ARM_HWCAP2_WFXT) g_cpuFeatures2 |= ARM_HWCAP2_WFXT;
182+
if(hwcaps2 & ARM_HWCAP2_EBF16) g_cpuFeatures2 |= ARM_HWCAP2_EBF16;
102183
#endif
103184

104185
#else
@@ -145,6 +226,10 @@ void cpuInit(void)
145226

146227
#elif defined(__x86_64__)||defined(__i386__)||defined(_M_X64)||defined(_M_IX86)
147228

229+
#if defined(__linux__)
230+
#include <sys/auxv.h>
231+
#endif
232+
148233
// mask off avx if os does not support
149234
static int AVX=0;
150235
// OSXSAVE
@@ -334,6 +419,18 @@ void cpuInit(void)
334419
#endif
335420

336421
OPENSSL_setcap();
422+
423+
#if defined(__linux__) && !defined(ANDROID)
424+
#ifndef HWCAP2_RING3MWAIT
425+
#define HWCAP2_RING3MWAIT (1 << 0)
426+
#endif
427+
#ifndef HWCAP2_FSGSBASE
428+
#define HWCAP2_FSGSBASE (1 << 1)
429+
#endif
430+
unsigned long hwcaps2= getauxval(AT_HWCAP2);
431+
if (hwcaps2 & HWCAP2_FSGSBASE) g_cpuFeatures2 |= CPU_X86_FEATURE2_RING3MWAIT;
432+
if (hwcaps2 & HWCAP2_FSGSBASE) g_cpuFeatures2 |= CPU_X86_FEATURE2_FSGSBASE;
433+
#endif
337434
}
338435

339436
#else
@@ -351,6 +448,10 @@ uint64_t getCpuFeatures(void)
351448
return g_cpuFeatures;
352449
}
353450

451+
uint64_t getCpuFeatures2(void)
452+
{
453+
return g_cpuFeatures2;
454+
}
354455

355456
intptr_t getCpuFamily(void)
356457
{

‎jsrc/cpuinfo.h‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
2323

2424
extern void cpuInit(void);
2525
extern uint64_t getCpuFeatures(void);
26+
extern uint64_t getCpuFeatures2(void);
2627
extern intptr_t getCpuFamily(void);
2728
extern void OPENSSL_setcap(void);
2829
extern int getNumberOfCores(void);
@@ -70,6 +71,47 @@ enum {
7071
ARM_HWCAP_USCAT = (1 << 25),
7172
ARM_HWCAP_ILRCPC = (1 << 26),
7273
ARM_HWCAP_FLAGM = (1 << 27),
74+
ARM_HWCAP_SSBS = (1 << 28),
75+
ARM_HWCAP_SB = (1 << 29),
76+
ARM_HWCAP_PACA = (1 << 30),
77+
ARM_HWCAP_PACG = (1UL << 31),
78+
};
79+
80+
enum {
81+
ARM_HWCAP2_DCPODP = (1 << 0),
82+
ARM_HWCAP2_SVE2 = (1 << 1),
83+
ARM_HWCAP2_SVEAES = (1 << 2),
84+
ARM_HWCAP2_SVEPMULL = (1 << 3),
85+
ARM_HWCAP2_SVEBITPERM = (1 << 4),
86+
ARM_HWCAP2_SVESHA3 = (1 << 5),
87+
ARM_HWCAP2_SVESM4 = (1 << 6),
88+
ARM_HWCAP2_FLAGM2 = (1 << 7),
89+
ARM_HWCAP2_FRINT = (1 << 8),
90+
ARM_HWCAP2_SVEI8MM = (1 << 9),
91+
ARM_HWCAP2_SVEF32MM = (1 << 10),
92+
ARM_HWCAP2_SVEF64MM = (1 << 11),
93+
ARM_HWCAP2_SVEBF16 = (1 << 12),
94+
ARM_HWCAP2_I8MM = (1 << 13),
95+
ARM_HWCAP2_BF16 = (1 << 14),
96+
ARM_HWCAP2_DGH = (1 << 15),
97+
ARM_HWCAP2_RNG = (1 << 16),
98+
ARM_HWCAP2_BTI = (1 << 17),
99+
ARM_HWCAP2_MTE = (1 << 18),
100+
ARM_HWCAP2_ECV = (1 << 19),
101+
ARM_HWCAP2_AFP = (1 << 20),
102+
ARM_HWCAP2_RPRES = (1 << 21),
103+
ARM_HWCAP2_MTE3 = (1 << 22),
104+
ARM_HWCAP2_SME = (1 << 23),
105+
ARM_HWCAP2_SME_I16I64 = (1 << 24),
106+
ARM_HWCAP2_SME_F64F64 = (1 << 25),
107+
ARM_HWCAP2_SME_I8I32 = (1 << 26),
108+
ARM_HWCAP2_SME_F16F32 = (1 << 27),
109+
ARM_HWCAP2_SME_B16F32 = (1 << 28),
110+
ARM_HWCAP2_SME_F32F32 = (1 << 29),
111+
ARM_HWCAP2_SME_FA64 = (1 << 30),
112+
ARM_HWCAP2_WFXT = (1UL << 31),
113+
ARM_HWCAP2_EBF16 = (1UL << 32),
114+
ARM_HWCAP2_SVE_EBF16 = (1UL << 33),
73115
};
74116

75117
#elif defined(__x86_64__)||defined(__i386__)||defined(_M_X64)||defined(_M_IX86)
@@ -93,6 +135,10 @@ enum {
93135
CPU_X86_FEATURE_BMI2 = (1 << 13),
94136
CPU_X86_FEATURE_AVX512 = (1 << 14),
95137
};
138+
enum {
139+
CPU_X86_FEATURE2_RING3MWAIT = (1 << 15), /* MONITOR/MWAIT enabled in Ring 3 */
140+
CPU_X86_FEATURE2_FSGSBASE = (1 << 16), /* Kernel allows FSGSBASE instructions available in Ring 3 */
141+
};
96142

97143
#endif
98144

‎jsrc/j.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,7 @@ DX zeroDX={0,0,iv1}; /* 0 */
8080
Z zeroZ={0,0}; /* 0j0 */
8181
I iotavec[IOTAVECLEN]; // return values for i. small
8282
uint64_t g_cpuFeatures; // blis
83+
uint64_t g_cpuFeatures2; // fsgsbase
8384
int numberOfCores; // number of cpu cores
8485
UC hwaes=0; // hardware aes support
8586
UC hwfma=0; // blis cpu tuning

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