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pseidererkvalo
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wifi: ath9k: fix AR9003 mac hardware hang check register offset calculation
Fix ath9k_hw_verify_hang()/ar9003_hw_detect_mac_hang() register offset calculation (do not overflow the shift for the second register/queues above five, use the register layout described in the comments above ath9k_hw_verify_hang() instead). Fixes: 222e048 ("ath9k: Fix MAC HW hang check for AR9003") Reported-by: Gregg Wonderly <greggwonderly@seqtechllc.com> Link: https://lore.kernel.org/linux-wireless/E3A9C354-0CB7-420C-ADEF-F0177FB722F4@seqtechllc.com/ Signed-off-by: Peter Seiderer <ps.report@gmx.net> Acked-by: Toke Høiland-Jørgensen <toke@toke.dk> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20230422212423.26065-1-ps.report@gmx.net
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Lines changed: 18 additions & 9 deletions

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drivers/net/wireless/ath/ath9k/ar9003_hw.c

Lines changed: 18 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1099,17 +1099,22 @@ static bool ath9k_hw_verify_hang(struct ath_hw *ah, unsigned int queue)
10991099
{
11001100
u32 dma_dbg_chain, dma_dbg_complete;
11011101
u8 dcu_chain_state, dcu_complete_state;
1102+
unsigned int dbg_reg, reg_offset;
11021103
int i;
11031104

1104-
for (i = 0; i < NUM_STATUS_READS; i++) {
1105-
if (queue < 6)
1106-
dma_dbg_chain = REG_READ(ah, AR_DMADBG_4);
1107-
else
1108-
dma_dbg_chain = REG_READ(ah, AR_DMADBG_5);
1105+
if (queue < 6) {
1106+
dbg_reg = AR_DMADBG_4;
1107+
reg_offset = queue * 5;
1108+
} else {
1109+
dbg_reg = AR_DMADBG_5;
1110+
reg_offset = (queue - 6) * 5;
1111+
}
11091112

1113+
for (i = 0; i < NUM_STATUS_READS; i++) {
1114+
dma_dbg_chain = REG_READ(ah, dbg_reg);
11101115
dma_dbg_complete = REG_READ(ah, AR_DMADBG_6);
11111116

1112-
dcu_chain_state = (dma_dbg_chain >> (5 * queue)) & 0x1f;
1117+
dcu_chain_state = (dma_dbg_chain >> reg_offset) & 0x1f;
11131118
dcu_complete_state = dma_dbg_complete & 0x3;
11141119

11151120
if ((dcu_chain_state != 0x6) || (dcu_complete_state != 0x1))
@@ -1128,6 +1133,7 @@ static bool ar9003_hw_detect_mac_hang(struct ath_hw *ah)
11281133
u8 dcu_chain_state, dcu_complete_state;
11291134
bool dcu_wait_frdone = false;
11301135
unsigned long chk_dcu = 0;
1136+
unsigned int reg_offset;
11311137
unsigned int i = 0;
11321138

11331139
dma_dbg_4 = REG_READ(ah, AR_DMADBG_4);
@@ -1139,12 +1145,15 @@ static bool ar9003_hw_detect_mac_hang(struct ath_hw *ah)
11391145
goto exit;
11401146

11411147
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1142-
if (i < 6)
1148+
if (i < 6) {
11431149
chk_dbg = dma_dbg_4;
1144-
else
1150+
reg_offset = i * 5;
1151+
} else {
11451152
chk_dbg = dma_dbg_5;
1153+
reg_offset = (i - 6) * 5;
1154+
}
11461155

1147-
dcu_chain_state = (chk_dbg >> (5 * i)) & 0x1f;
1156+
dcu_chain_state = (chk_dbg >> reg_offset) & 0x1f;
11481157
if (dcu_chain_state == 0x6) {
11491158
dcu_wait_frdone = true;
11501159
chk_dcu |= BIT(i);

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