Skip to content

Commit 93da5a0

Browse files
pelwellSasha Levin
authored andcommitted
arm64: dts: bcm2712: PL011 UARTs are actually r1p5
[ Upstream commit 7689536 ] The ARM PL011 UART instances in BCM2712 are r1p5 spec, which means they have 32-entry FIFOs. The correct periphid value for this is 0x00341011. Thanks to N Buchwitz for pointing this out. Signed-off-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250223125614.3592-3-wahrenst@gmx.net Fixes: faa3381 ("arm64: dts: broadcom: Add minimal support for Raspberry Pi 5") Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
1 parent 4a339b4 commit 93da5a0

1 file changed

Lines changed: 1 addition & 1 deletion

File tree

arch/arm64/boot/dts/broadcom/bcm2712.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -232,7 +232,7 @@
232232
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
233233
clocks = <&clk_uart>, <&clk_vpu>;
234234
clock-names = "uartclk", "apb_pclk";
235-
arm,primecell-periphid = <0x00241011>;
235+
arm,primecell-periphid = <0x00341011>;
236236
status = "disabled";
237237
};
238238

0 commit comments

Comments
 (0)