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pelwellSasha Levin
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ARM: dts: bcm2711: PL011 UARTs are actually r1p5
[ Upstream commit 0de0902 ] The ARM PL011 UART instances in BCM2711 are r1p5 spec, which means they have 32-entry FIFOs. The correct periphid value for this is 0x00341011. Thanks to N Buchwitz for pointing this out. Signed-off-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250223125614.3592-2-wahrenst@gmx.net Fixes: 7dbe8c6 ("ARM: dts: Add minimal Raspberry Pi 4 support") Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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arch/arm/boot/dts/bcm2711.dtsi

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
137-
arm,primecell-periphid = <0x00241011>;
137+
arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -145,7 +145,7 @@
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
148-
arm,primecell-periphid = <0x00241011>;
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arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -156,7 +156,7 @@
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
159-
arm,primecell-periphid = <0x00241011>;
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arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -167,7 +167,7 @@
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clocks = <&clocks BCM2835_CLOCK_UART>,
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<&clocks BCM2835_CLOCK_VPU>;
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clock-names = "uartclk", "apb_pclk";
170-
arm,primecell-periphid = <0x00241011>;
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arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -1154,6 +1154,7 @@
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};
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&uart0 {
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arm,primecell-periphid = <0x00341011>;
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interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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};
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