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Automatic merge of 'master' into merge (2026-04-07 07:47)
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.mailmap

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@@ -316,6 +316,7 @@ Hans Verkuil <hverkuil@kernel.org> <hverkuil-cisco@xs4all.nl>
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Hans Verkuil <hverkuil@kernel.org> <hansverk@cisco.com>
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Hao Ge <hao.ge@linux.dev> <gehao@kylinos.cn>
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Harry Yoo <harry.yoo@oracle.com> <42.hyeyoo@gmail.com>
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Harry Yoo <harry@kernel.org> <harry.yoo@oracle.com>
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Heiko Carstens <hca@linux.ibm.com> <h.carstens@de.ibm.com>
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Heiko Carstens <hca@linux.ibm.com> <heiko.carstens@de.ibm.com>
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Heiko Stuebner <heiko@sntech.de> <heiko.stuebner@bqreaders.com>
@@ -327,6 +328,7 @@ Henrik Rydberg <rydberg@bitmath.org>
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Herbert Xu <herbert@gondor.apana.org.au>
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Huacai Chen <chenhuacai@kernel.org> <chenhc@lemote.com>
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Huacai Chen <chenhuacai@kernel.org> <chenhuacai@loongson.cn>
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Ignat Korchagin <ignat@linux.win> <ignat@cloudflare.com>
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Ike Panhc <ikepanhc@gmail.com> <ike.pan@canonical.com>
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J. Bruce Fields <bfields@fieldses.org> <bfields@redhat.com>
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J. Bruce Fields <bfields@fieldses.org> <bfields@citi.umich.edu>
@@ -586,6 +588,7 @@ Morten Welinder <terra@gnome.org>
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Morten Welinder <welinder@anemone.rentec.com>
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Morten Welinder <welinder@darter.rentec.com>
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Morten Welinder <welinder@troll.com>
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Muhammad Usama Anjum <usama.anjum@arm.com> <usama.anjum@collabora.com>
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Mukesh Ojha <quic_mojha@quicinc.com> <mojha@codeaurora.org>
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Muna Sinada <quic_msinada@quicinc.com> <msinada@codeaurora.org>
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Murali Nalajala <quic_mnalajal@quicinc.com> <mnalajal@codeaurora.org>

Documentation/PCI/pcieaer-howto.rst

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@@ -85,6 +85,16 @@ In the example, 'Requester ID' means the ID of the device that sent
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the error message to the Root Port. Please refer to PCIe specs for other
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fields.
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The 'TLP Header' is the prefix/header of the TLP that caused the error
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in raw hex format. To decode the TLP Header into human-readable form
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one may use tlp-tool:
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https://github.com/mmpg-x86/tlp-tool
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Example usage::
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curl -L https://git.kernel.org/linus/2ca1c94ce0b6 | rtlp-tool --aer
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AER Ratelimits
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--------------
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Documentation/core-api/dma-attributes.rst

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@@ -149,11 +149,33 @@ For architectures that require cache flushing for DMA coherence
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DMA_ATTR_MMIO will not perform any cache flushing. The address
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provided must never be mapped cacheable into the CPU.
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DMA_ATTR_CPU_CACHE_CLEAN
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------------------------
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This attribute indicates the CPU will not dirty any cacheline overlapping this
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DMA_FROM_DEVICE/DMA_BIDIRECTIONAL buffer while it is mapped. This allows
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multiple small buffers to safely share a cacheline without risk of data
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corruption, suppressing DMA debug warnings about overlapping mappings.
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All mappings sharing a cacheline should have this attribute.
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DMA_ATTR_DEBUGGING_IGNORE_CACHELINES
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------------------------------------
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This attribute indicates that CPU cache lines may overlap for buffers mapped
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with DMA_FROM_DEVICE or DMA_BIDIRECTIONAL.
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Such overlap may occur when callers map multiple small buffers that reside
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within the same cache line. In this case, callers must guarantee that the CPU
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will not dirty these cache lines after the mappings are established. When this
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condition is met, multiple buffers can safely share a cache line without risking
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data corruption.
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All mappings that share a cache line must set this attribute to suppress DMA
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debug warnings about overlapping mappings.
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DMA_ATTR_REQUIRE_COHERENT
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-------------------------
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DMA mapping requests with the DMA_ATTR_REQUIRE_COHERENT fail on any
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system where SWIOTLB or cache management is required. This should only
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be used to support uAPI designs that require continuous HW DMA
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coherence with userspace processes, for example RDMA and DRM. At a
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minimum the memory being mapped must be userspace memory from
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pin_user_pages() or similar.
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Drivers should consider using dma_mmap_pages() instead of this
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interface when building their uAPIs, when possible.
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It must never be used in an in-kernel driver that only works with
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kernel memory.

Documentation/dev-tools/kunit/run_wrapper.rst

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- ``--list_tests_attr``: If set, lists all tests that will be run and all of their
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attributes.
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- ``--list_suites``: If set, lists all suites that will be run.
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Command-line completion
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==============================
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Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml

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required:
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- refresh-rate-hz
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additionalProperties: false
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unevaluatedProperties: false
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examples:
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- |

Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml

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const: 2
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"#interrupt-cells":
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const: 1
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const: 2
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ngpios:
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description:
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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interrupts = <53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,
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<53>, <53>, <53>, <53>,

Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml

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Flash sub nodes describe the memory range and optional per-flash
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properties.
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allOf:
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- $ref: mtd.yaml#
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properties:
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compatible:
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const: st,spear600-smi
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Functional clock rate of the SMI controller in Hz.
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st,smi-fast-mode:
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type: boolean
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description: Indicates that the attached flash supports fast read mode.
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patternProperties:
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"^flash@.*$":
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$ref: /schemas/mtd/mtd.yaml#
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properties:
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reg:
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maxItems: 1
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st,smi-fast-mode:
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type: boolean
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description: Indicates that the attached flash supports fast read mode.
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unevaluatedProperties: false
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required:
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- reg
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required:
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- compatible
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- reg
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- clock-rate
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- "#address-cells"
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- "#size-cells"
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unevaluatedProperties: false
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interrupts = <12>;
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clock-rate = <50000000>; /* 50 MHz */
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flash@f8000000 {
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flash@fc000000 {
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reg = <0xfc000000 0x1000>;
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st,smi-fast-mode;
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};

Documentation/devicetree/bindings/regulator/regulator.yaml

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offset from voltage set to regulator.
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regulator-uv-protection-microvolt:
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description: Set over under voltage protection limit. This is a limit where
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description: Set under voltage protection limit. This is a limit where
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hardware performs emergency shutdown. Zero can be passed to disable
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protection and value '1' indicates that protection should be enabled but
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limit setting can be omitted. Limit is given as microvolt offset from
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is given as microvolt offset from voltage set to regulator.
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regulator-uv-warn-microvolt:
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description: Set over under voltage warning limit. This is a limit where
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description: Set under voltage warning limit. This is a limit where
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hardware is assumed still to be functional but approaching limit where
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it gets damaged. Recovery actions should be initiated. Zero can be passed
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to disable detection and value '1' indicates that detection should

Documentation/devicetree/bindings/sound/rockchip-spdif.yaml

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- const: rockchip,rk3066-spdif
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- items:
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- enum:
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- rockchip,rk3576-spdif
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- rockchip,rk3588-spdif
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- const: rockchip,rk3568-spdif
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Documentation/devicetree/bindings/sound/st,stm32-sai.yaml

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properties:
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compatible:
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contains:
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const: st,stm32mph7-sai
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const: st,stm32h7-sai
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then:
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properties:
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clocks:

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