It's difficult to tell what signals are read/write and which ones are just read.
I think each component could have a input { signal1, signal2 } and output { signal3, signal4 } collection. It's a bit more boilerplate, but it's a lot more explicit about who is producing and who is consuming.
It's difficult to tell what signals are read/write and which ones are just read.
I think each component could have a input { signal1, signal2 } and output { signal3, signal4 } collection. It's a bit more boilerplate, but it's a lot more explicit about who is producing and who is consuming.