Update index.md

Author: nirhasabnis

index.md

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 ## About me
 
-I am currently a Research Scientist at Machine Programming Lab in [Intel Labs](https://www.intel.com/content/www/us/en/research/overview.html). My research interests are at the intersection of application of artificial intelligence, machine learning, and formal method techniques to problems in compilers, HPC, software systems, and software engineering. Recently, along with my collaborators, I am also exploring ability of AI models to automatically parallelize serial code for shared-memory and distributed-memory systems. Previously, I implemented and published an automated system, named [ControlFlag](https://www.intel.com/content/www/us/en/newsroom/news/machine-programming-tool-detects-bugs-code.html), that learns to detect programming errors in code. ControlFlag is [open-source now](https://github.com/IntelLabs/control-flag), and has been covered by several news outlets such as [Communications of ACM](https://cacm.acm.org/careers/256477-intel-opens-controlflag-machine-learning-system-for-improving-code-quality/fulltext), [Venturebeat](https://venturebeat.com/2020/12/03/intels-controlflag-taps-ai-to-automatically-detect-errors-in-code/), [ZDNet](https://www.zdnet.com/article/developers-intels-automated-debugging-tool-controlflag-is-now-open-source/), [TechRepublic](https://www.techrepublic.com/article/intel-unveils-machine-programming-tool-to-detect-bugs-in-code/), etc.
+I am currently a Principal Research Scientist at [Code Metal](https://codemetal.ai), where we are developing and applying AI and formal method techniques for code migration and optimization. My research interests are at the intersection of application of artificial intelligence, machine learning, and formal method techniques to problems in compilers, HPC, software systems, and software engineering. For past few months, along with my collaborators, I have been also exploring AI-driven techniques to automatically parallelize serial code for shared-memory and distributed-memory systems.
+
+Before joining Code Metal, I was a Research Scientist at Machine Programming Lab in [Intel Labs](https://www.intel.com/content/www/us/en/research/overview.html). I was also part of a research project exploring an [MLIR-based compiler for high-performance deep learning on Intel Xeon platforms](https://arxiv.org/pdf/2404.15204). Orthogonally, I also implemented and published an autonomous system, named [ControlFlag](https://www.intel.com/content/www/us/en/newsroom/news/machine-programming-tool-detects-bugs-code.html), that learns to detect programming errors in code. ControlFlag is [open-source now](https://github.com/IntelLabs/control-flag), and has been covered by several news outlets such as [Communications of ACM](https://cacm.acm.org/careers/256477-intel-opens-controlflag-machine-learning-system-for-improving-code-quality/fulltext), [Venturebeat](https://venturebeat.com/2020/12/03/intels-controlflag-taps-ai-to-automatically-detect-errors-in-code/), [ZDNet](https://www.zdnet.com/article/developers-intels-automated-debugging-tool-controlflag-is-now-open-source/), [TechRepublic](https://www.techrepublic.com/article/intel-unveils-machine-programming-tool-to-detect-bugs-in-code/), etc. Additionally, as a part of my interest, I was also collaborating with Prof. [Alvin Cheung](https://people.eecs.berkeley.edu/~akcheung/) and his group at UC Berkeley on the problem of [code translation with formal verification](https://metalift.pages.dev/).
 
 Prior to joining Intel, I was a PhD student at [Secure Systems Lab](http://seclab.cs.sunysb.edu/seclab/) at [Stony Brook University](https://www.stonybrook.edu/), and I was advised by Prof. R. Sekar. At Stony Brook, I conducted research in program analysis, symbolic execution, machine learning techniques to learn code translators, and binary analysis.
 
 ## (Some of the) Publications
 (_Complete list is in [Google Scholar](https://scholar.google.com/citations?hl=en&user=p8vutGkAAAAJ&view_op=list_works&sortby=pubdate)_)
 
+- Verified Code Transpilation with LLMs [[pdf]](https://arxiv.org/abs/2406.03003)<br/>
+  Sahil Bhatia, Jie Qiu, Niranjan Hasabnis, Sanjit A. Seshia, Alvin Cheung <br/>
+  _To appear in [**NeurIPS**](https://nips.cc/virtual/2024/poster/93370) 2024_ <br/>
+
+- Tenspiler: A Verified Lifting-Based Compiler for Tensor Operations [[pdf]](https://arxiv.org/abs/2404.18249) <br/>
+  Jie Qiu, Colin Cai, Sahil Bhatia, Niranjan Hasabnis, Sanjit A Seshia, Alvin Cheung <br/>
+  _In European Conference on Object-oriented Programming [**ECOOP**](https://2024.ecoop.org/details/ecoop-2024-papers/41/Tenspiler-A-Verified-Lifting-Based-Compiler-for-Tensor-Operations), 2024_ <br/>
+
+- MonoCoder: Domain-Specific Code Language Model for HPC Codes and Tasks [[pdf]](https://arxiv.org/abs/2312.13322) <br/>
+  Tal Kadosh, Niranjan Hasabnis, Vy Vo, Nadav Schneider, Neva Krien, Mihai Capotă, Abdul Wasay, Guy Tamir, Theodore L Willke, Nesreen Ahmed, Yuval Pinter, Tim Mattson, Gal Oren <br/>
+  _In 8th Annual IEEE High Performance Extreme Computing Virtual Conference ([**HPEC**](https://ieee-hpec.org/index.php/ieee-hpec-2024-prelim-agenda/)), 2024_ <br/>
+  **Outstanding Paper Award** <br/>
+
+- OMPar: Automatic Parallelization with AI-Driven Source-to-Source Compilation [[pdf]](https://arxiv.org/pdf/2409.14771) <br/>
+Tal Kadosh, Niranjan Hasabnis, Prema Soundararajan, Vy A Vo, Mihai Capota, Nesreen Ahmed, Yuval Pinter, Gal Oren <br/>
+_To appear in [**MLforSys at NeurIPS**](https://mlforsystems.org/), 2024_ <br/>
+  
 - Quantifying OpenMP: Statistical Insights into Usage and Adoption [[pdf]](https://arxiv.org/pdf/2308.08002.pdf)<br/>
   Tal Kadosh, Niranjan Hasabnis, Timothy Mattson, Yuval Pinter, Gal Oren <br/>
   _In 27th IEEE High Performance Extreme Computing ([**HPEC**](https://ieee-hpec.org/)), 2023_ <br/>
 
-- Advising OpenMP Parallelization via a Graph-Based Approach with Transformers [[pdf]](https://arxiv.org/pdf/2305.11999.pdf) <br/>
-Tal Kadosh, Nadav Schneider, Niranjan Hasabnis, Timothy Mattson, Yuval Pinter, Gal Oren <br/>
- _In 19th International Workshop on OpenMP ([**IWOMP**](https://www.iwomp.org/iwomp-2023/)), 2023_ <br/>
-
 - MPI-rical: Data-Driven MPI Distributed Parallelism Assistance with Transformers [[pdf]](https://arxiv.org/pdf/2305.09438.pdf) <br/>
 Nadav Schneider, Tal Kadosh, Niranjan Hasabnis, Timothy Mattson, Yuval Pinter, Gal Oren <br/>
  _In AI4Dev workshop ([**AI4Dev**](https://ai4dev-workshop.github.io/2023/)) at SuperComputing, 2023_ <br/>
 
-- CWD: A Machine Learning based Approach to Detect Unknown Cloud Workloads [[pdf]](https://arxiv.org/abs/2211.15739) <br/>
-Mohammad Hossain, Derssie Mebratu, Niranjan Hasabnis, Jun Jin, Gaurav Chaudhary, Noah Shen <br/>
- _In The MLSys Workshop on Cloud Intelligence (**AIOps**), 2022_ <br/>
-
-- Are Machine Programming Systems using Right Source Code Measures to select Code Repositories [[pdf]](https://arxiv.org/abs/2209.11946), [[video]](https://youtu.be/wAcXvUjQQYQ) <br/>
-  Niranjan Hasabnis <br/>
-  _In MaLTeSQuE 2022 workshop to be held with ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering **(ESEC-FSE)**, November 2022_ <br/>
-
 - GitRank: A Framework to Rank GitHub Repositories [[pdf]](https://ieeexplore.ieee.org/document/9796321), [[video]](https://youtu.be/FObVm-T6_Og), [[git]](https://github.com/nirhasabnis/gitrank) <br />
   Niranjan Hasabnis <br />
   _In Mining Software Repositories **(MSR)**, 2022_ <br />
 
-- ControlFlag: A Self-supervised Idiosyncratic Pattern Detection System for Software Control Structures [[pdf]](https://dl.acm.org/doi/pdf/10.1145/3460945.3464954) <br />
-  Niranjan Hasabnis and Justin Gottschlich <br />
-  _In the 5th Annual Symposium on Machine Programming **(MAPS)**, 2021_ <br />
-  
-- Automatic Tuning of Tensorflow’s CPU Backend Using Gradient-Free Optimization Algorithms [[pdf]](https://link.springer.com/content/pdf/10.1007%2F978-3-030-90539-2_17.pdf) <br />
-  Derssie Mebratu, Niranjan Hasabnis, Pietro Mercati, Gaurit Sharma, Shamima Najnin <br /> 
-  _In Machine Learning on HPC Systems **(MLHPCS-ISC)**, 2021_ <br />
-
-- Distributed MLPerf ResNet50 Training on Intel Xeon Architectures with TensorFlow [[pdf]](https://dl.acm.org/doi/pdf/10.1145/3440722.3440880) <br />
-  Wei Wang and Niranjan Hasabnis <br />
-  _In the International Conference on High Performance Computing in Asia-Pacific Region, 2021_ <br />
-
 - ControlFlag: A Self-supervised Idiosyncratic Pattern Detection System for Software Control Structures [[pdf]](https://mlforsystems.org/assets/papers/neurips2020/controlflag_hasabnis_2020.pdf) <br />
   Niranjan Hasabnis and Justin Gottschlich <br />
   _In Workshop on ML for Systems at NeurIPS, 2020_ <br />
@@ -51,10 +46,6 @@ Mohammad Hossain, Derssie Mebratu, Niranjan Hasabnis, Jun Jin, Gaurav Chaudhary,
   Niranjan Hasabnis <br />
   _In IEEE/ACM Machine Learning in HPC Environments **(MLHPC)**, 2018_ <br />
 
-- Accelerating TensorFlow on Modern Intel Architectures <br />
-  Niranjan Hasabnis, et al. <br />
-  _In Workshop on Architectures for Intelligent Machines, 2017_ <br />
-
 - Synthesizing Instruction-set semantics using Symbolic Execution of Code Generators [[pdf]](https://dl.acm.org/doi/pdf/10.1145/2950290.2950335) <br />
   Niranjan Hasabnis and R. Sekar. <br />
   _In ACM SIGSOFT International Symposium on Foundations of Software Engineering **(FSE)**, 2016_ <br />
@@ -71,27 +62,21 @@ Mohammad Hossain, Derssie Mebratu, Niranjan Hasabnis, Jun Jin, Gaurav Chaudhary,
   Niranjan Hasabnis, Rui Qiao, and R. Sekar. <br />
   _In International Symposium on Code Generation and Optimization **(CGO)**, 2015_
 
-- Automatic Generation of Assembly to IR Translators Using Compilers [[pdf]](https://pdfs.semanticscholar.org/b3b1/3502f97f4266bcde7f1070c1b918791aee5c.pdf) <br /> 
-  Niranjan Hasabnis and R. Sekar. <br />
-  _In Workshop on Architectural and Microarchitectural Support for Binary Translation **(AMAS-BT)**, 2015_
-
 - A Platform for Secure Static Binary Instrumentation [[pdf]](https://dl.acm.org/doi/pdf/10.1145/2576195.2576208) <br />
   Mingwei Zheng, Rui Qiao, Niranjan Hasabnis, and R. Sekar. <br />
   _In International Conference on Virtual Execution Environments **(VEE)**, 2014_
 
-- Light-weight Bounds Checking [[pdf]](https://dl.acm.org/doi/pdf/10.1145/2259016.2259034) <br />
-  Niranjan Hasabnis, Ashish Misra, and R. Sekar. <br />
-  _In International Symposium on Code Generation and Optimization **(CGO)**, 2012_
-
 ## Service
 
+- [USENIX ATC'25](https://www.usenix.org/conference/atc25/call-for-papers)
 - [ICSE'24](https://conf.researchr.org/committee/icse-2024/icse-2024-software-engineering-in-practice-software-engineering-in-practice), [FSE'24](https://2024.esec-fse.org/)
 - [MLforSys - NeurIPS'23](http://mlforsystems.org/), [FSE'23](https://2023.esec-fse.org/committee/fse-2023-industry-program-committee), [USENIX ATC'23](https://www.usenix.org/conference/atc23), [MSR'23](https://conf.researchr.org/track/msr-2023/msr-2023-industry-track#Call-for-Papers), [AIDB'23](https://sites.google.com/view/aidb2023), [ASE'23](https://conf.researchr.org/track/ase-2023/ase-2023-industry-showcase-papers)
 - [AIDB'22](https://sites.google.com/view/aidb2022/home/program-committee), [FSE'22](https://2022.esec-fse.org/committee/fse-2022-industry-program-committee), [USENIX ATC'22](https://www.usenix.org/conference/atc22/call-for-papers), [MSR'22](https://conf.researchr.org/home/msr-2022), [ASE'22](https://conf.researchr.org/committee/ase-2022/ase-2022-industry-showcase-program-committee)
 - [AIDB'21](https://sites.google.com/view/aidb2021/home/program-commitee), [MAPS'21](https://pldi21.sigplan.org/home/maps-2021)
 
 ## Awards
 
+- **Outstanding paper** award for Monocoder paper at HPEC 2024
 - High 5 Award for filing atleast 5 invention disclosures, Intel, 2022
 - Silver medal in ACM Student Research Competition, Code Generation and Optimization (CGO), 2015.
 - Computer Science Fellowship, Stony Brook University, 2010.