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README.md

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- Intro *TODO*
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- Programmers Guide - Link to the architecture
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- Getting EDA tools, quartus, vivado
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- [Toolchains](https://openrisc.io/tutorials/toolchains.html) - Stub *TODO*
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- Binaries - downloads from github, need to setup CI for building

index.md

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# OpenRISC Tutorials
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These are tutorials for the OpenRISC processor. The simulations run on
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different FPGA boards and simulators. Hence, the different tutorials
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have different requirements, which you can find in the list below. If
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you have downloaded the tutorials and are new to OpenRISC, you
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probably want the real [quick start](#quick-start).
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## Quick Start
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This is the real quick start if you have downloaded and extracted the
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tutorials. The output files are already part of what you have
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downloaded, but you still need some tools. You can install prebuilt
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versions of them:
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./bootstrap-quick-start.sh
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This downloads all free and open tools. Unfortunately, you will still
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need to install closed (but free) tools from the FPGA vendors:
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* [Altera Quartus Prime](#altera-quartus-prime) for Altera FPGAs
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([DE0 nano](de0_nano/)).
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You can now start with the [tutorials](#tutorials).
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## Set Environment
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Once you have installed the dependencies, you can do the following
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tutorials. For convenience, you can set the environment variables for
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all tools downloaded and installed automatically:
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source environment.sh
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## Tutorials
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There are simulations and FPGA boards supported, and some general
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tutorials help you working with the OpenRISC ecosystem.
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### Simulations
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* [or1ksim](or1ksim/README.md), dependencies:
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* For running: [or1ksim](#or1ksim)
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* For building own software: [toolchain](#toolchain)
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### FPGA Boards
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* [Terasic DE0 nano board](de0_nano/README.md), dependencies:
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* For running: [OpenOCD](#openocd), [toolchain](#toolchain),
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[Altera Quartus Prime](#altera-quartus-prime)
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* For building hardware: [FuseSoC](#fusesoc)
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### Debug Environment
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The OpenRISC cpu, simulator and toolchain provide a full debugging
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environment with gdb and OpenOCD. At a low level this is provided with
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[adv_debug_sys](https://github.com/olofk/adv_debug_sys) which provides
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jtag interface for OpenOCD to talk to. Much debugging can be done
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directly in OpenOCD. GDB communicates with OpenOCD to provide a familiar
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debugging environment for programmers. For more details see:
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* [Debugging OpenRISCi FPGAs with OpenOCD](docs/Debugging.html)
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These are tutorials for the [OpenRISC](https://openrisc.io) processor. The tutorials run on
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different FPGA boards and simulators. Hence, the different tutorials have
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different requirements. Each tutorial tries to be as independent as possible and
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will instruct you how to download what is needed, but for FPGA development some
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basics will be needed.
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## Contributing
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If you wish to contribute to the tutorials please see our
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[openrisc/totorials](https://github.com/openrisc/tutorials) git repo where this
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site's source code is hosted.
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Checkout the **TODO** list in `README.md`.
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## Programming
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These tutorials cover setting up development environments for OpenRISC hardware
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and/or software development. For embedded system programming we recommend
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getting familiar with OpenRISC assembly and C.
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### Assembly
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If you are interested in writing programs in OpenRISC assembly read the
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[OpenRISC architecture spec](https://openrisc.io/architecture) to understand the
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capabilities and programming model of OpenRISC.
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Example of what OpenRISC assembly looks like:
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```
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.global _main
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_main:
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l.ori r3, r0, 2
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l.ori r4, r0, 2
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l.mul r5, r3, r4
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l.sfeqi r5, 4
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l.bf test_ok
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l.nop
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```
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### Bare Metal C/C++
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If you want to write programs in bare metal C taking advantage of the OpenRISC
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architecture facilities such as exception handling, MMU and timers
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checkout the newlib [or1k apis](https://openrisc.io/newlib/docs/html/modules.html).
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Example of what OpenRISC bare metal looks like:
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```c
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#include <or1k-support.h>
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#include <or1k-sprs.h>
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#include <stdint.h>
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void
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or1k_interrupts_enable(void)
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{
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uint32_t sr = or1k_mfspr(OR1K_SPR_SYS_SR_ADDR);
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sr = OR1K_SPR_SYS_SR_IEE_SET(sr, 1);
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or1k_mtspr(OR1K_SPR_SYS_SR_ADDR, sr);
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}
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uint32_t
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or1k_interrupts_disable(void)
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{
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uint32_t oldsr, newsr;
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oldsr= or1k_mfspr(OR1K_SPR_SYS_SR_ADDR);
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newsr = OR1K_SPR_SYS_SR_IEE_SET(oldsr, 0);
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or1k_mtspr(OR1K_SPR_SYS_SR_ADDR, newsr);
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return OR1K_SPR_SYS_SR_IEE_GET(oldsr);
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}
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```
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See the [newlib tutorial](newlib.html) for details on how to setup the newlib development
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environment. Or checkout the [Quickstart tutorial](images.html) for docker images
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that have the newlib environment out of the box.
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## Tools (partially required)
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### OpenOCD
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The [OpenOCD](http://www.openocd.org) version delivered with the Linux
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distributions is most probably outdated. Hence, you can quickly
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install a current version inside the tutorials:
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make openocd-download
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In case you cannot start openocd, you may rebuilt it also:
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make openocd-build
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### Toolchain
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The OpenRISC software tool chain consists of all the tools require to
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compile and manipulate software for the platform. Specifically, the
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tool chain which is considered the development version will be used to
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compile code to run on the "bare metal" system. That is, with no
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underlying operating system.
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You will need the toolchain if you want to compile software. The quick
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way just to play around with this tutorials is to run from the base
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path:
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make toolchain-baremetal
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### FuseSoC
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FuseSoC is an automated build environment and package manager for
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OpenRISC. You can install it as described
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[here](https://github.com/olofk/fusesoc) (recommended) or use the
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prebuilt binaries:
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make fusesoc-download
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You can also built it in this tutorial path:
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make fusesoc-build
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### or1ksim
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[here](https://github.com/olofk/fusesoc).
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or1ksim is the OpenRISC instruction set simulator. You can download
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the prebuilt binary:
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Featured in:
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make or1ksim-download
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* [De0 Nano](de0_nano/) - De0 Nano FPGA development board platform tutorial.
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* [Quickstart Images](images.html) - Docker verilog development environment
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or build it here:
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make or1ksim-build
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### OpenOCD
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### Linux
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The [OpenOCD](http://www.openocd.org) version delivered with the Linux
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distributions is most probably outdated. Hence, you can quickly
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install a current version.
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There is a prebuilt Linux image you can simply download:
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Featured in:
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make linux-download
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* [De0 Nano](de0_nano/) - De0 Nano FPGA development board platform tutorial.
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* [Debugging](docs/Debugging.html) - OpenOCD debugging cheat sheet.
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### Altera Quartus Prime
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### Quartus Prime
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This is the software which compiles RTL and ultimately generates an
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FPGA programming file. Unfortunately this software is closed source,
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extremely large, and requires registration to download. However, it is
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required.
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required for some tutorials.
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Featured in:
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* [De0 Nano](de0_nano/) - De0 Nano FPGA development board platform tutorial.
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For downloading the free version, visit the
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[Altera website](http://dl.altera.com/?edition=lite) and
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[download the latest version of Quartus Prime Lite](http://download.altera.com/akdlm/software/acdsinst/15.1/185/ib_tar/Quartus-lite-15.1.0.185-linux.tar). It
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is 4.5GB in size and will obviously take a while to download. Once it
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[Intel website](https://www.intel.com/content/www/us/en/software-kit/849769/intel-quartus-prime-lite-edition-design-software-version-24-1-for-linux.html) and
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download the latest version of Quartus Prime Lite.
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It is more than 7GB in size and will obviously take a while to download. Once it
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is downloaded, extract it and run the setup.sh file in there. Install
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it to any location (e.g. `/opt/altera/lite`).
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it to any location.
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Once downloaded and extracted you can run the installer from the command line as follows:
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```bash
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./components/QuartusLiteSetup-24.1std.0.1077-linux.run --mode text \
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--unattendedmodeui none \
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--installdir /opt/quartus-24.1 \
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--disable-components quartus_help --accept_eula 1
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```
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After installation add the following path (corrected for your
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installation) to the search path:
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export PATH=/opt/altera/lite/15.1/quartus/bin/:$PATH
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```bash
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export PATH=/opt/quartus-24.1/quartus/bin/:$PATH
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```
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*Note:* Make sure you select to include the Cyclone IV E device
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families during installation.
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### Vivado
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Like Quartus this is the software which compiles RTL and generates an FPGA
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programming file. This software is closed source, extremely large, and requires
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registration to download. It is required for the Litex ARTY tutorials.
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Visit the [Vivado downloads](https://www.xilinx.com/support/download.html)
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page and get the latest version.

toolchains.md

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An embedded systems toolchain is an essential part to compiling, debugging
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disassembling software. We provide all of the standard options.
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disassembling software. We provide all of the standard toolchains.
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A lot of details are on the OpenRISC [software](https://openrisc.io/software) page.

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