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@EECS-151 EECS-151

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    16 repositories

    • fpga_project_sp26

      Public template
      SystemVerilog
      •0•0•0•0•Updated Apr 24, 2026Apr 24, 2026

    • asic_project_sp26

      Public template
      C
      •0•0•0•0•Updated Apr 10, 2026Apr 10, 2026

    • fpga-labs-sp26

      Public template
      SystemVerilog
      •0•0•0•0•Updated Feb 24, 2026Feb 24, 2026

    • asic-labs-sp26

      Public template
      SystemVerilog
      •0•1•0•0•Updated Feb 20, 2026Feb 20, 2026

    • fpga_project_fa25

      Public template
      Verilog
      •1•0•0•0•Updated Dec 12, 2025Dec 12, 2025

    • asic_project_fa25

      Public template
      C
      •0•0•0•0•Updated Nov 7, 2025Nov 7, 2025

    • fpga-labs-fa25

      Public template
      Verilog
      •1•0•0•0•Updated Sep 26, 2025Sep 26, 2025

    • asic-labs-fa25

      Public template
      Verilog
      •3•0•0•0•Updated Sep 26, 2025Sep 26, 2025

    • asic_project_sp25

      Public template
      C
      •1•0•0•0•Updated Apr 28, 2025Apr 28, 2025

    • fpga_project_sp25

      Public template
      Verilog
      •0•4•0•0•Updated Apr 18, 2025Apr 18, 2025

    • fpga-labs-sp25

      Public template
      Verilog
      •0•1•0•0•Updated Feb 22, 2025Feb 22, 2025

    • asic-labs-sp25

      Public template
      Verilog
      •0•0•0•0•Updated Feb 21, 2025Feb 21, 2025

    • fpga_project_fa24

      Public template
      Verilog
      •0•0•0•0•Updated Nov 19, 2024Nov 19, 2024

    • asic_project_fa24

      Public template
      C
      •1•0•0•0•Updated Oct 19, 2024Oct 19, 2024

    • fpga-labs-fa24

      Public template
      Verilog
      •0•0•0•0•Updated Oct 11, 2024Oct 11, 2024

    • asic-labs-fa24

      Public template
      Verilog
      •0•1•0•0•Updated Oct 11, 2024Oct 11, 2024
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