merge in multicast-e2e

Author: zeeshanlakhani

.github/buildomat/jobs/image.sh

@@ -101,7 +101,7 @@ pfexec chown "$UID" /out
 
 banner "P4 Codegen"
 # Add gcc-12 so the p4 compiler can find cpp
-PATH=/opt/gcc-12/bin:$PATH cargo xtask codegen --stages $TOFINO_STAGES
+PATH=/opt/gcc-12/bin:$PATH cargo xtask codegen --stages $TOFINO_STAGES --multicast
 
 # Preserve all the diagnostics spit out by the compiler
 mkdir -p /out/p4c-diags

.github/buildomat/jobs/multicast-test.sh

@@ -8,15 +8,11 @@ export WS=$wd
 MODEL_STARTUP_TIMEOUT=${MODEL_STARTUP_TIMEOUT:=5}
 STARTUP_TIMEOUT=${STARTUP_TIMEOUT:=120}
 
-if [ x$MULTICAST == x ]; then
-        BUILD_FEATURES=tofino_asic
-	CODEGEN_FEATURES=
-        SWADM_FEATURES=
-    else
-        BUILD_FEATURES=tofino_asic,multicast
-	CODEGEN_FEATURES=--multicast
-        SWADM_FEATURES=--features=multicast
-fi
+BUILD_FEATURES=tofino_asic
+
+CODEGEN_FEATURES=--multicast
+SWADM_FEATURES="--features=multicast"
+
 TOFINO_STAGES=18
 function cleanup {
     set +o errexit

.github/buildomat/packet-test-common.sh

@@ -4,6 +4,7 @@ version = "0.1.0"
 edition = "2024"
 
 [features]
+default = ["multicast"]
 multicast = []
 
 [dependencies]

Cargo.lock

@@ -0,0 +1,177 @@
+// This Source Code Form is subject to the terms of the Mozilla Public
+// License, v. 2.0. If a copy of the MPL was not distributed with this
+// file, You can obtain one at https://mozilla.org/MPL/2.0/
+//
+// Copyright 2026 Oxide Computer Company
+
+//! Fuse data types for Tofino ASICs.
+//!
+//! Chip revision info is exposed in oximeter metrics via the `asic_lot` field
+//! (e.g., "FL1234-B1").
+//!
+//! TODO: Add a dedicated `asic_chip_rev` field to oximeter timeseries when
+//! reconfigurator supports oximeter schema migration. Currently there is no
+//! window during online updates where all switches stop producing data, so the
+//! old schema cannot be safely updated.
+
+use schemars::JsonSchema;
+use serde::Serialize;
+
+/// Chip revision derived from device_id and rev_num fuse fields.
+#[derive(Clone, Debug, JsonSchema, Serialize)]
+pub struct ChipRevision {
+    /// Computed revision string (e.g., "A0", "B0", "B1").
+    pub rev: String,
+    /// Raw device ID from fuse.
+    pub device_id: u16,
+    /// Raw revision number from fuse.
+    pub rev_num: u8,
+}
+
+impl ChipRevision {
+    /// Compute chip revision from device_id and rev_num.
+    pub fn from_fuse(device_id: u16, rev_num: u8) -> Self {
+        let rev = match device_id {
+            0x0100 => "A0".to_string(),
+            0x0110 => match rev_num {
+                0 => "B0".to_string(),
+                2 => "B1".to_string(),
+                _ => format!("{:04x}", device_id),
+            },
+            _ => format!("{:04x}", device_id),
+        };
+        Self { rev, device_id, rev_num }
+    }
+}
+
+/// Part identification from fuse data.
+#[derive(Clone, Debug, JsonSchema, Serialize)]
+pub struct PartInfo {
+    /// Part number (13 bits).
+    pub part_num: u16,
+    /// Package ID (2 bits).
+    pub pkg_id: u8,
+    /// Fuse version (2 bits).
+    pub version: u8,
+}
+
+/// Features disabled via fuse programming.
+#[derive(Clone, Debug, JsonSchema, Serialize)]
+pub struct DisabledFeatures {
+    /// Disabled pipes (4-bit bitmap).
+    pub pipes: u8,
+    /// Disabled ports (40-bit bitmap).
+    pub ports: u64,
+    /// Disabled speeds (64-bit bitmap).
+    pub speeds: u64,
+    /// Disabled MAUs per pipe (21 bits each).
+    pub mau: [u32; 4],
+    /// Disabled traffic manager memory (32-bit bitmap).
+    pub tm_mem: u32,
+    /// Buffer sync disabled.
+    pub bsync: bool,
+    /// Packet generator disabled.
+    pub pgen: bool,
+    /// Resubmit disabled.
+    pub resub: bool,
+}
+
+/// Frequency settings from fuse data.
+#[derive(Clone, Debug, JsonSchema, Serialize)]
+pub struct FrequencySettings {
+    /// Frequency disabled.
+    pub disabled: bool,
+    /// Backplane port speed frequency (2 bits).
+    pub bps: u8,
+    /// Packet processing speed frequency (2 bits).
+    pub pps: u8,
+    /// Extended backplane frequency (4 bits).
+    pub bps_ext: u8,
+    /// Extended packet speed frequency (4 bits).
+    pub pps_ext: u8,
+    /// PCIe disabled (2 bits).
+    pub pcie_dis: u8,
+    /// CPU speed disabled (2 bits).
+    pub cpu_speed_dis: u8,
+}
+
+/// Manufacturing and repair data from fuse.
+#[derive(Clone, Debug, JsonSchema, Serialize)]
+pub struct ManufacturingData {
+    /// Voltage scaling value (12 bits).
+    pub voltage_scaling: u16,
+    /// PMRO and skew value (12 bits).
+    pub pmro_and_skew: u16,
+    /// Die rotation.
+    pub die_rotation: bool,
+    /// Silent spin (2 bits).
+    pub silent_spin: u8,
+    /// Wafer core repair applied.
+    pub wf_core_repair: bool,
+    /// Core repair applied.
+    pub core_repair: bool,
+    /// Tile repair applied.
+    pub tile_repair: bool,
+    /// Soft pipe disable (4 bits).
+    pub soft_pipe_dis: u8,
+}
+
+/// Organized fuse data from the Tofino ASIC.
+#[derive(Clone, Debug, JsonSchema, Serialize)]
+pub struct FuseData {
+    /// Chip revision information.
+    pub chip_rev: ChipRevision,
+    /// Part identification.
+    pub part: PartInfo,
+    /// Disabled features.
+    pub disabled: DisabledFeatures,
+    /// Frequency settings.
+    pub frequency: FrequencySettings,
+    /// Manufacturing and repair data.
+    pub manufacturing: ManufacturingData,
+}
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn chip_revision_a0() {
+        let rev = ChipRevision::from_fuse(0x0100, 0);
+        assert_eq!(rev.rev, "A0");
+        assert_eq!(rev.device_id, 0x0100);
+        assert_eq!(rev.rev_num, 0);
+    }
+
+    #[test]
+    fn chip_revision_b0() {
+        let rev = ChipRevision::from_fuse(0x0110, 0);
+        assert_eq!(rev.rev, "B0");
+        assert_eq!(rev.device_id, 0x0110);
+        assert_eq!(rev.rev_num, 0);
+    }
+
+    #[test]
+    fn chip_revision_b1() {
+        let rev = ChipRevision::from_fuse(0x0110, 2);
+        assert_eq!(rev.rev, "B1");
+        assert_eq!(rev.device_id, 0x0110);
+        assert_eq!(rev.rev_num, 2);
+    }
+
+    #[test]
+    fn chip_revision_unknown_rev_num() {
+        let rev = ChipRevision::from_fuse(0x0110, 5);
+        assert_eq!(rev.rev, "0110");
+        assert_eq!(rev.device_id, 0x0110);
+        assert_eq!(rev.rev_num, 5);
+    }
+
+    #[test]
+    fn chip_revision_unknown_device_id() {
+        let rev = ChipRevision::from_fuse(0x0200, 0);
+        assert_eq!(rev.rev, "0200");
+        assert_eq!(rev.device_id, 0x0200);
+        assert_eq!(rev.rev_num, 0);
+    }
+}

aal/Cargo.toml

@@ -13,6 +13,9 @@ use thiserror::Error;
 
 use common::ports::{PortFec, PortMedia, PortPrbsMode, PortSpeed, TxEq};
 
+mod fuse;
+pub use fuse::*;
+
 mod match_action;
 pub use match_action::*;
 
@@ -43,8 +46,10 @@ pub trait SidecarIdentifiers {
     fn asic_backend(&self) -> &str;
     fn fab(&self) -> Option<char>;
     fn lot(&self) -> Option<char>;
+    fn lotnum(&self) -> Option<[char; 4]>;
     fn wafer(&self) -> Option<u8>;
     fn wafer_loc(&self) -> Option<(i16, i16)>;
+    fn fuse_info(&self) -> Option<FuseData>;
 }
 
 /// Error type conveying additional information about ASIC errors

aal/src/fuse.rs

@@ -4,6 +4,7 @@ version = "0.1.0"
 edition = "2024"
 
 [features]
+default = ["multicast"]
 tofino_asic = [
     "dep:lazy_static",
     "dep:transceiver-controller",

aal/src/lib.rs

@@ -2,7 +2,7 @@
 // License, v. 2.0. If a copy of the MPL was not distributed with this
 // file, You can obtain one at https://mozilla.org/MPL/2.0/
 //
-// Copyright 2025 Oxide Computer Company
+// Copyright 2026 Oxide Computer Company
 
 use std::env;
 use std::fs::File;

asic/Cargo.toml

@@ -566,7 +566,10 @@ impl AsicOps for Handle {
 
     fn get_sidecar_identifiers(&self) -> AsicResult<impl SidecarIdentifiers> {
         unfurl!(self, get_sidecar_identifiers);
-        Ok(Identifiers::default())
+        Ok(Identifiers {
+            fuse: Some(crate::faux_fuse_data()),
+            ..Default::default()
+        })
     }
 }