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M. Rezaalipour, M. Biasion, F. Costa, C. Tirelli, L. Ferretti, <ins>R. Otoni</ins>, G. Constantinides, and L. Pozzi.
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<b>Approximate Logic Synthesis via Iterative SMT-based Subcircuit Rewriting</b>.
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Early Access.
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<a href="https://doi.org/10.1109/TCAD.2025.3638267">DOI</a> (<a href="https://rodrigo7491.github.io/files/papers/approximate_logic_synthesis_via_iterative_smt-based_subcircuit_rewriting.pdf">preprint</a>)
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<a href="https://doi.org/10.1109/TCAD.2025.3638267">DOI</a> (<a href="https://rodrigo7491.github.io/files/papers/Approximate_Logic_Synthesis_via_Iterative_SMT-based_Subcircuit_Rewriting.pdf">preprint</a>)
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