[Section: 7 Registers] Magic address 0x48001018?

[bishtpawan]

Can anyone please guide me on how we chose offset 0x18? I've read about Memory map and register boundary addresses and got to know the GPIOE has boundary address range (0x4800 1000 - 0x4800 13FF).

But I didn't get how we decided that we are interested in offset 0x18 only.

Thanks

[sirhcel]

Hello @bishtpawan, in the first place the "magic" address simply refers to a memory-mapped register. This is a peripheral register which - in contrast to the MCU core registers - is not referenced by a location encoded in a MCU instruction but by a memory address. Reading from this memory address returns the register contents and writing to this memory location sets the register contents.

In the second place the example demonstrates the so-called bit banding. A mechanism for setting or clearing/resetting individual bits of a register by writing to a different register. This allows atomic updates of the original register and eliminates the need for reading from it, modifying the read value, and writing the result back to the original register which might fail in case of concurrent modifications without synchronizing them.

Offset 0x18 ist such a bit banding register (GPIOE_BSRR) for manipulating individual bits of the output data register (ODR). This comes in quite handy if you want to modify two GPIO pins of the same port from different contexts. For example, regular program flow and an interrupt handler. Have a look at the following sections from the reference manual for more details:

• 11.3.5, I/O data bitwise handling
• 11.4.7, GPIO port bit set/reset register (GPIOx_BSRR) (x = A..H)

If this answers your question, please close this issue. Otherwise, feel free to ask more.