Skip to content

Commit b48a0db

Browse files
authored
Merge pull request #243 from ryanbreen/feat/virgl-msi-interrupt-gpu
feat: MSI interrupt-driven VirtIO GPU + VirGL fixes
2 parents add8de8 + 5385302 commit b48a0db

17 files changed

Lines changed: 3282 additions & 105 deletions

File tree

kernel/src/arch_impl/aarch64/exception.rs

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1028,6 +1028,12 @@ pub extern "C" fn handle_irq() {
10281028
crate::drivers::usb::xhci::handle_interrupt();
10291029
}
10301030
}
1031+
// VirtIO GPU PCI interrupt dispatch (MSI completion)
1032+
if let Some(gpu_irq) = crate::drivers::virtio::gpu_pci::get_irq() {
1033+
if irq_id == gpu_irq {
1034+
crate::drivers::virtio::gpu_pci::handle_interrupt();
1035+
}
1036+
}
10311037
}
10321038

10331039
// Should not happen - GIC filters invalid IDs (1020+)

kernel/src/arch_impl/aarch64/timer_interrupt.rs

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -168,11 +168,6 @@ pub extern "C" fn timer_interrupt_handler() {
168168
// Increment timer interrupt counter (used for debugging when needed)
169169
let _count = TIMER_INTERRUPT_COUNT.fetch_add(1, Ordering::Relaxed) + 1;
170170

171-
// Debug breadcrumb: print '.' every 200 ticks (~1 second) to verify timer is alive
172-
if cpu_id == 0 && _count % 200 == 0 {
173-
raw_serial_char(b'.');
174-
}
175-
176171
// CPU 0 only: poll input devices (single-device, not safe from multiple CPUs)
177172
if cpu_id == 0 {
178173
poll_keyboard_to_stdin();

kernel/src/drivers/mod.rs

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,14 @@ pub fn init() -> usize {
9797
serial_println!("[drivers] Found {} VirtIO PCI devices", virtio_devices.len());
9898

9999
match virtio::gpu_pci::init() {
100-
Ok(()) => serial_println!("[drivers] VirtIO GPU (PCI) initialized"),
100+
Ok(()) => {
101+
serial_println!("[drivers] VirtIO GPU (PCI) initialized");
102+
// Attempt to initialize VirGL 3D acceleration if the device supports it
103+
match virtio::gpu_pci::virgl_init() {
104+
Ok(()) => serial_println!("[drivers] VirGL 3D acceleration active"),
105+
Err(e) => serial_println!("[drivers] VirGL init skipped: {}", e),
106+
}
107+
}
101108
Err(e) => serial_println!("[drivers] VirtIO GPU (PCI) init failed: {}", e),
102109
}
103110

kernel/src/drivers/usb/xhci.rs

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4122,7 +4122,7 @@ fn setup_xhci_msi(pci_dev: &crate::drivers::pci::Device) -> u32 {
41224122
// On Parallels ARM64, GICv2m is at 0x02250000 (discovered from MADT).
41234123
const PARALLELS_GICV2M_BASE: u64 = 0x0225_0000;
41244124
let gicv2m_base = crate::platform_config::gicv2m_base_phys();
4125-
let (base, spi_base, spi_count) = if gicv2m_base != 0 {
4125+
let (base, _spi_base, spi_count) = if gicv2m_base != 0 {
41264126
// Already probed
41274127
(
41284128
gicv2m_base,
@@ -4146,8 +4146,12 @@ fn setup_xhci_msi(pci_dev: &crate::drivers::pci::Device) -> u32 {
41464146
return 0;
41474147
}
41484148

4149-
// Step 3: Allocate first available SPI for XHCI
4150-
let spi = spi_base;
4149+
// Step 3: Allocate next available SPI for XHCI
4150+
let spi = crate::platform_config::allocate_msi_spi();
4151+
if spi == 0 {
4152+
xhci_trace_note(0, "err:alloc_spi");
4153+
return 0;
4154+
}
41514155
let intid = spi; // GIC INTID = SPI number for GICv2m
41524156

41534157
// Step 4: Program PCI MSI registers

0 commit comments

Comments
 (0)