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OP_EA_SUBROUTINES.L68
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1698 lines (1694 loc) · 95.9 KB
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00001000 Starting Address
Assembler used: EASy68K Editor/Assembler v5.16.01
Created On: 12/4/2021 22:46:26
00000000 1 *-----------------------------------------------------------
00000000 2 * Title :
00000000 3 * Written by :
00000000 4 * Date :
00000000 5 * Description:
00000000 6 *-----------------------------------------------------------
00000000 =0000000D 7 CR EQU $0D
00000000 =0000000A 8 LF EQU $0A
00000000 =0000001A 9 START_ADDR EQU $01A
00001000 10 ORG $1000
00001000 11 START: ; first instruction of program
00001000 12 *-------ESTABLISH STACK - MOVE TO IO LATER--------
00001000 2E7C 00100000 13 MOVEA.L #$00100000,SP
00001006 14
00001006 15 *-------Code for Output------
00001006 43F9 00001CCE 16 LEA INPUT_MSG, A1
0000100C 103C 000E 17 MOVE.B #14,D0
00001010 4E4F 18 TRAP #15 *Displays message
00001012 19
00001012 20 *-------Code for Intput------
00001012 2279 00001CE4 21 MOVEA.L INPUT,A1
00001018 103C 0002 22 MOVE.B #2,D0
0000101C 4E4F 23 TRAP #15
0000101E 24
0000101E 247C 0000001A 25 MOVEA.L #START_ADDR,A2
00001024 1401 26 MOVE.B D1,D2
00001026 27 *Convert user input from str to hex
00001026 28 LOOP_CONV
00001026 B43C 0000 29 CMP.B #0,D2
0000102A 6700 0026 30 BEQ CONV_DONE
0000102E 31
0000102E 1619 32 MOVE.B (A1)+,D3 *Move curr byte (8 bits) to D3
00001030 5302 33 SUB.B #1,D2 *decrement counter
00001032 34
00001032 B63C 0039 35 CMP.B #$39,D3
00001036 6F00 0012 36 BLE CONV_NUM
0000103A 37
0000103A B63C 0041 38 CMP.B #$41,D3
0000103E 6C00 0002 39 BGE CONV_LETTER
00001042 40
00001042 41 CONV_LETTER
00001042 0403 0037 42 SUB.B #$37,D3
00001046 14C3 43 MOVE.B D3,(A2)+ *Store converted bits in A2
00001048 60DC 44 BRA LOOP_CONV
0000104A 45
0000104A 46 CONV_NUM
0000104A 0403 0030 47 SUB.B #$30,D3
0000104E 14C3 48 MOVE.B D3,(A2)+
00001050 60D4 49 BRA LOOP_CONV
00001052 50
00001052 51 CONV_DONE
00001052 247C 0000001A 52 MOVEA.L #START_ADDR,A2
00001058 4202 53 CLR.B D2
0000105A 143C 0004 54 MOVE.B #4,D2
0000105E 55 CONCAT_BITS
0000105E B43C 0000 56 CMP.B #0,D2
00001062 6700 0010 57 BEQ START_OP
00001066 58
00001066 59 *Concatenate bits
00001066 181A 60 MOVE.B (A2)+,D4
00001068 E98C 61 LSL.L #4,D4 *(Source 1) Shift 4 bits
0000106A 62
0000106A D81A 63 ADD.B (A2)+,D4 *(Source 1) Add next hex digit
0000106C 64
0000106C E18B 65 LSL.L #8,D3 *clear 8 bits
0000106E D604 66 ADD.B D4,D3 *concat
00001070 67
00001070 5302 68 SUB.B #1,D2 *decrement counter
00001072 60EA 69 BRA CONCAT_BITS
00001074 70
00001074 71
00001074 72 * OP CODE SUBROUTINE
00001074 73 START_OP
00001074 74
00001074 75 NOP
00001074 383C 4E71 76 MOVE.W #$4E71,D4
00001078 B644 77 CMP.W D4,D3
0000107A 6600 0012 78 BNE RTS
0000107E 79 *Print instruction to output
0000107E 43F9 00001D0A 80 LEA PRNT_NOP,A1
00001084 103C 000E 81 MOVE.B #14,D0
00001088 4E4F 82 TRAP #15
0000108A FFFF FFFF 83 SIMHALT
0000108E 84 *RTS *Return to I/O subroutine to find next instruction
0000108E 85 RTS
0000108E 383C 4E75 86 MOVE.W #$4E75,D4
00001092 B644 87 CMP.W D4,D3
00001094 6600 0012 88 BNE FIND_OP
00001098 89 *Print instruction
00001098 43F9 00001D0E 90 LEA PRNT_RTS,A1
0000109E 103C 000E 91 MOVE.B #14,D0
000010A2 4E4F 92 TRAP #15
000010A4 FFFF FFFF 93 SIMHALT
000010A8 94 *RTS
000010A8 95
000010A8 96 FIND_OP *determine op code based on first 2 bits
000010A8 1C3C 000E 97 MOVE.B #14,D6
000010AC 3803 98 MOVE.W D3,D4
000010AE EC6C 99 LSR.W D6,D4
000010B0 100
000010B0 B83C 0000 101 CMP.B #%00,D4 *MOVE,MOVEA
000010B4 6700 001A 102 BEQ OP_00
000010B8 103
000010B8 B83C 0001 104 CMP.B #%01,D4 *MOVEQ, MOVEM, ADDQ, LEA, NOT, BGT/BLE/BEQ, JSR, BRA
000010BC 6700 00A8 105 BEQ OP_01
000010C0 106
000010C0 B83C 0002 107 CMP.B #%10,D4 *OR,SUB
000010C4 6700 0396 108 BEQ OP_10
000010C8 109
000010C8 B83C 0003 110 CMP.B #%11,D4 *ADD,AND,LSL,LSR,ROL,ROR,ASL,ASR
000010CC 6700 04FC 111 BEQ OP_11
000010D0 112
000010D0 113 OP_00 *Determine if MOVE or MOVEA op code
000010D0 114 *Isolate bits 6,7,8
000010D0 3803 115 MOVE.W D3,D4
000010D2 EF4C 116 LSL.W #7,D4 *Remove first 7 bits
000010D4 1C3C 000D 117 MOVE.B #13,D6
000010D8 EC6C 118 LSR.W D6,D4 *Remove last 6 bits
000010DA B87C 0001 119 CMP.W #%001,D4
000010DE 6700 0012 120 BEQ IS_MOVEA
000010E2 121 IS_MOVE
000010E2 122 *Print MOVE
000010E2 43F9 00001D12 123 LEA PRNT_MOVE,A1
000010E8 103C 000E 124 MOVE.B #14,D0
000010EC 4E4F 125 TRAP #15
000010EE 126
000010EE 6000 000E 127 BRA MOVE_SIZE
000010F2 128
000010F2 129 IS_MOVEA
000010F2 130 *Print MOVEA
000010F2 43F9 00001D17 131 LEA PRNT_MOVEA,A1
000010F8 103C 000E 132 MOVE.B #14,D0
000010FC 4E4F 133 TRAP #15
000010FE 134 MOVE_SIZE
000010FE 3803 135 MOVE.W D3,D4
00001100 1C3C 000E 136 MOVE.B #14,D6
00001104 E54C 137 LSL.W #2,D4 *Remove first 2 bits
00001106 EC6C 138 LSR.W D6,D4 *Remove last 12 bits to find size code
00001108 139
00001108 B83C 0001 140 CMP.B #%01,D4
0000110C 6700 0016 141 BEQ MOVE_B
00001110 142
00001110 B83C 0003 143 CMP.B #%11,D4
00001114 6700 0024 144 BEQ MOVE_W
00001118 145
00001118 B83C 0002 146 CMP.B #%10,D4
0000111C 6700 0032 147 BEQ MOVE_L
00001120 6000 0948 148 BRA INVALID_OP
00001124 149 MOVE_B
00001124 150 *Print .B (byte)
00001124 4EB9 00001A34 151 JSR PRINT_B
0000112A 152 *Proceed to EA Subroutine
0000112A 4EB9 00001B12 153 JSR EA_SRC
00001130 4EB9 00001B2A 154 JSR EA_DEST
00001136 155
00001136 FFFF FFFF 156 SIMHALT * Done printing move
0000113A 157 MOVE_W
0000113A 158 *Print .W (word)
0000113A 4EB9 00001A46 159 JSR PRINT_W
00001140 160 *Proceed to EA Subroutine
00001140 4EB9 00001B12 161 JSR EA_SRC
00001146 4EB9 00001B2A 162 JSR EA_DEST
0000114C 163
0000114C FFFF FFFF 164 SIMHALT
00001150 165 MOVE_L
00001150 166 *Print .L (long)
00001150 4EB9 00001A58 167 JSR PRINT_L
00001156 168 *Proceed to EA Subroutine
00001156 4EB9 00001B12 169 JSR EA_SRC
0000115C 4EB9 00001B2A 170 JSR EA_DEST
00001162 171
00001162 FFFF FFFF 172 SIMHALT
00001166 173
00001166 174 OP_01 *MOVEQ, MOVEM, ADDQ, LEA, NOT, BGT/BLE/BEQ, JSR, BRA
00001166 3803 175 MOVE.W D3,D4
00001168 1C3C 000C 176 MOVE.B #12,D6
0000116C EC6C 177 LSR.W D6,D4 *get first 4 bits
0000116E 178
0000116E B83C 0007 179 CMP.B #%0111,D4 *MOVEQ
00001172 6700 001A 180 BEQ OP_0111
00001176 B83C 0004 181 CMP.B #%0100,D4 *MOVEM, LEA, NOT, JSR
0000117A 6700 0068 182 BEQ OP_0100
0000117E B83C 0005 183 CMP.B #%0101,D4 *ADDQ
00001182 6700 0184 184 BEQ OP_0101
00001186 B83C 0006 185 CMP.B #%0110,D4 *Bcc, BRA
0000118A 6700 0202 186 BEQ OP_0110
0000118E 187
0000118E 188 OP_0111 *MOVEQ
0000118E 189 *Check bit 8 to validate
0000118E 2803 190 MOVE.L D3,D4
00001190 EF4C 191 LSL.W #7,D4
00001192 1C3C 000F 192 MOVE.B #15,D6
00001196 EC6C 193 LSR.W D6,D4
00001198 B83C 0000 194 CMP.B #%0,D4
0000119C 6600 08CC 195 BNE INVALID_OP
000011A0 196
000011A0 197 *Print MOVEQ
000011A0 43F9 00001D23 198 LEA PRNT_MOVEQ,A1
000011A6 103C 000E 199 MOVE.B #14,D0
000011AA 4E4F 200 TRAP #15
000011AC 201
000011AC 2803 202 MOVE.L D3,D4
000011AE E14C 203 LSL.W #8,D4
000011B0 E04C 204 LSR.W #8,D4
000011B2 205 *Print data
000011B2 206
000011B2 207 ** Print # in front
000011B2 208
000011B2 43F9 00001D86 209 LEA PRNT_Q,A1
000011B8 103C 000E 210 MOVE.B #14,D0
000011BC 4E4F 211 TRAP #15
000011BE 212
000011BE 2204 213 MOVE.L D4,D1
000011C0 103C 0003 214 MOVE.B #3,D0
000011C4 4E4F 215 TRAP #15
000011C6 216
000011C6 217 *** Move reg. bits into a bitfield for EA
000011C6 3803 218 MOVE.W D3,D4
000011C8 C87C 0E00 219 AND.W #%0000111000000000,D4
000011CC E64C 220 LSR.W #3,D4
000011CE EC4C 221 LSR.W #6,D4
000011D0 1C04 222 MOVE.B D4,D6
000011D2 223
000011D2 48E7 FF00 224 MOVEM.L D0-D7,-(SP)
000011D6 225
000011D6 4EB9 00001B56 226 JSR EA_SUB
000011DC 227
000011DC 4CDF 00FF 228 MOVEM.L (SP)+,D0-D7
000011E0 229
000011E0 FFFF FFFF 230 SIMHALT ** Back to IO
000011E4 231
000011E4 232
000011E4 233 OP_0100 *MOVEM, LEA, NOT, JSR
000011E4 2803 234 MOVE.L D3,D4
000011E6 1C3C 000B 235 MOVE.B #11,D6
000011EA EC6C 236 LSR.W D6,D4
000011EC B83C 0009 237 CMP.B #%01001,D4 *MOVEM or JSR
000011F0 6700 00AE 238 BEQ OP_01001
000011F4 239
000011F4 240 *Check if LEA
000011F4 2803 241 MOVE.L D3,D4
000011F6 EF4C 242 LSL.W #7,D4
000011F8 1C3C 000D 243 MOVE.B #13,D6
000011FC EC6C 244 LSR.W D6,D4
000011FE B83C 0007 245 CMP.B #%111,D4 *Check bits 8,7,6
00001202 6600 003A 246 BNE IS_NOT
00001206 247
00001206 248 * Is LEA
00001206 43F9 00001D44 249 LEA PRNT_LEA,A1
0000120C 103C 000E 250 MOVE.B #14,D0
00001210 4E4F 251 TRAP #15
00001212 252 * HANDLE OPERANDS
00001212 1A3C 0003 253 MOVE.B #3,D5 * Size operation is always longword for LEA, so set here.
00001216 254
00001216 4EB9 00001B12 255 JSR EA_SRC * Handle the source EA
0000121C 256
0000121C 3803 257 MOVE.W D3,D4
0000121E C87C 0E00 258 AND.W #%0000111000000000,D4 * Isolate Register #
00001222 E64C 259 LSR.W #3,D4
00001224 EC4C 260 LSR.W #6,D4
00001226 1C04 261 MOVE.B D4,D6 * Prime D6 register
00001228 8C3C 0008 262 OR.B #%00001000,D6 * Add the An mode to D6
0000122C 263
0000122C 48E7 FF00 264 MOVEM.L D0-D7,-(SP) * Move register contents to stack
00001230 265
00001230 4EB9 00001B56 266 JSR EA_SUB * Handle the destination EA (last 6 bits of D6)
00001236 267
00001236 268 * MOVEM RETURN
00001236 4CDF 00FF 269 MOVEM.L (SP)+,D0-D7
0000123A 270
0000123A FFFF FFFF 271 SIMHALT * Return to IO
0000123E 272
0000123E 273
0000123E 274
0000123E 275 IS_NOT
0000123E 2803 276 MOVE.L D3,D4
00001240 E04C 277 LSR.W #8,D4
00001242 B87C 0046 278 CMP.W #%01000110,D4
00001246 6600 0822 279 BNE INVALID_OP
0000124A 280
0000124A 43F9 00001D3D 281 LEA PRNT_NOT,A1
00001250 103C 000E 282 MOVE.B #14,D0
00001254 4E4F 283 TRAP #15
00001256 284
00001256 2803 285 MOVE.L D3,D4
00001258 E14C 286 LSL.W #8,D4
0000125A 1C3C 000E 287 MOVE.B #14,D6
0000125E EC6C 288 LSR.W D6,D4
00001260 B83C 0000 289 CMP.B #%00,D4
00001264 6700 0016 290 BEQ NOT_B
00001268 B83C 0001 291 CMP.B #%01,D4
0000126C 6700 0018 292 BEQ NOT_W
00001270 B83C 0002 293 CMP.B #%10,D4
00001274 6700 001A 294 BEQ NOT_L
00001278 295
00001278 6000 07F0 296 BRA INVALID_OP
0000127C 297 NOT_B
0000127C 4EB9 00001A34 298 JSR PRINT_B
00001282 299 *Proceed to EA Subroutine
00001282 6000 0012 300 BRA NOT_EA
00001286 301 NOT_W
00001286 4EB9 00001A46 302 JSR PRINT_W
0000128C 303 *Proceed to EA Subroutine
0000128C 6000 0008 304 BRA NOT_EA
00001290 305 NOT_L
00001290 4EB9 00001A58 306 JSR PRINT_L
00001296 307 *Proceed to EA Subroutine
00001296 308
00001296 309 NOT_EA * DEALING W/ NOT EA HERE (May need to save registers...) *************
00001296 310
00001296 4EB9 00001B12 311 JSR EA_SRC
0000129C FFFF FFFF 312 SIMHALT *** Return to IO ***
000012A0 313
000012A0 314
000012A0 315 OP_01001
000012A0 2803 316 MOVE.L D3,D4
000012A2 EC4C 317 LSR.W #6,D4
000012A4 B87C 013A 318 CMP.W #%0100111010,D4 *Check if JSR
000012A8 6600 0012 319 BNE IS_MOVEM
000012AC 43F9 00001D29 320 LEA PRNT_JSR,A1
000012B2 103C 000E 321 MOVE.B #14,D0
000012B6 4E4F 322 TRAP #15
000012B8 FFFF FFFF 323 SIMHALT
000012BC 324 *Proceed to EA Subroutine
000012BC 325 IS_MOVEM
000012BC 326 *Check bits 9,8,7 to validate
000012BC 2803 327 MOVE.L D3,D4
000012BE ED4C 328 LSL.W #6,D4
000012C0 1C3C 000D 329 MOVE.B #13,D6
000012C4 EC6C 330 LSR.W D6,D4
000012C6 B83C 0001 331 CMP.B #%001,D4
000012CA 6600 079E 332 BNE INVALID_OP
000012CE 333
000012CE 43F9 00001D1D 334 LEA PRNT_MOVEM,A1
000012D4 103C 000E 335 MOVE.B #14,D0
000012D8 4E4F 336 TRAP #15
000012DA 337
000012DA 2803 338 MOVE.L D3,D4
000012DC 1C3C 0009 339 MOVE.B #9,D6
000012E0 ED6C 340 LSL.W D6,D4
000012E2 1C3C 000F 341 MOVE.B #15,D6
000012E6 EC6C 342 LSR.W D6,D4
000012E8 343
000012E8 B83C 0000 344 CMP.B #0,D4
000012EC 6700 000E 345 BEQ MOVEM_W
000012F0 B83C 0001 346 CMP.B #1,D4
000012F4 6700 000C 347 BEQ MOVEM_L
000012F8 6000 0770 348 BRA INVALID_OP
000012FC 349 MOVEM_W
000012FC 4EB9 00001A46 350 JSR PRINT_W
00001302 351 *Proceed to EA Subroutine
00001302 352 MOVEM_L
00001302 4EB9 00001A58 353 JSR PRINT_L
00001308 354 *Proceed to EA Subroutine
00001308 355 OP_0101 *ADDQ
00001308 356 *Check bit 8 to validate
00001308 2803 357 MOVE.L D3,D4
0000130A EF4C 358 LSL.W #7,D4
0000130C 1C3C 000F 359 MOVE.B #15,D6
00001310 EC6C 360 LSR.W D6,D4
00001312 B83C 0000 361 CMP.B #%0,D4
00001316 6600 0752 362 BNE INVALID_OP
0000131A 363
0000131A 364 *Print ADDQ
0000131A 43F9 00001D48 365 LEA PRNT_ADDQ,A1
00001320 103C 000E 366 MOVE.B #14,D0
00001324 4E4F 367 TRAP #15
00001326 368
00001326 2803 369 MOVE.L D3,D4
00001328 E14C 370 LSL.W #8,D4 *Remove first 8 bits
0000132A 1C3C 000E 371 MOVE.B #14,D6
0000132E EC6C 372 LSR.W D6,D4 *and last 6 bits to get size
00001330 373
00001330 B83C 0000 374 CMP.B #%00,D4
00001334 6700 0012 375 BEQ ADDQ_B
00001338 B83C 0001 376 CMP.B #%01,D4
0000133C 6700 0014 377 BEQ ADDQ_W
00001340 B83C 0002 378 CMP.B #%10,D4
00001344 6700 0016 379 BEQ ADDQ_L
00001348 380
00001348 381 ADDQ_B
00001348 382 *Print .B
00001348 4EB9 00001A34 383 JSR PRINT_B
0000134E 6000 0016 384 BRA ADDQ_DATA
00001352 385
00001352 386 ADDQ_W
00001352 387 *Print .W
00001352 4EB9 00001A46 388 JSR PRINT_W
00001358 6000 000C 389 BRA ADDQ_DATA
0000135C 390
0000135C 391 ADDQ_L
0000135C 392 *Print .L
0000135C 4EB9 00001A58 393 JSR PRINT_L
00001362 6000 0002 394 BRA ADDQ_DATA
00001366 395 ADDQ_DATA
00001366 2803 396 MOVE.L D3,D4
00001368 E94C 397 LSL.W #4,D4 *Remove first 4 bits
0000136A 1C3C 000D 398 MOVE.B #13,D6
0000136E EC6C 399 LSR.W D6,D4
00001370 400
00001370 401 *Print data
00001370 43F9 00001D86 402 LEA PRNT_Q,A1
00001376 103C 000E 403 MOVE.B #14,D0
0000137A 4E4F 404 TRAP #15
0000137C 405
0000137C 3204 406 MOVE.W D4,D1
0000137E 103C 0003 407 MOVE.B #3,D0
00001382 4E4F 408 TRAP #15
00001384 409
00001384 410 * Handle EA
00001384 4EB9 00001B12 411 JSR EA_SRC
0000138A 412
0000138A FFFF FFFF 413 SIMHALT * Return to IO
0000138E 414
0000138E 415 *Proceed to EA Subroutine
0000138E 416 OP_0110
0000138E 2803 417 MOVE.L D3,D4
00001390 1C3C 000C 418 MOVE.B #12,D6
00001394 E94C 419 LSL.W #4,D4
00001396 EC6C 420 LSR.W D6,D4
00001398 421
00001398 B87C 0000 422 CMP.W #%0000,D4
0000139C 6700 001E 423 BEQ IS_BRA
000013A0 424
000013A0 B87C 000E 425 CMP.W #%1110,D4
000013A4 6700 0026 426 BEQ IS_BGT
000013A8 427
000013A8 B87C 000F 428 CMP.W #%1111,D4
000013AC 6700 002E 429 BEQ IS_BLE
000013B0 430
000013B0 B87C 0007 431 CMP.W #%0111,D4
000013B4 6700 0036 432 BEQ IS_BEQ
000013B8 433
000013B8 6000 06B0 434 BRA INVALID_OP
000013BC 435 IS_BRA
000013BC 43F9 00001D39 436 LEA PRNT_BRA,A1
000013C2 103C 000E 437 MOVE.B #14,D0
000013C6 4E4F 438 TRAP #15
000013C8 FFFF FFFF 439 SIMHALT
000013CC 440
000013CC 441 IS_BGT
000013CC 43F9 00001D2D 442 LEA PRNT_BGT,A1
000013D2 103C 000E 443 MOVE.B #14,D0
000013D6 4E4F 444 TRAP #15
000013D8 FFFF FFFF 445 SIMHALT
000013DC 446 IS_BLE
000013DC 43F9 00001D31 447 LEA PRNT_BLE,A1
000013E2 103C 000E 448 MOVE.B #14,D0
000013E6 4E4F 449 TRAP #15
000013E8 FFFF FFFF 450 SIMHALT
000013EC 451 IS_BEQ
000013EC 43F9 00001D35 452 LEA PRNT_BEQ,A1
000013F2 103C 000E 453 MOVE.B #14,D0
000013F6 4E4F 454 TRAP #15
000013F8 FFFF FFFF 455 SIMHALT
000013FC 456
000013FC 457 DISP *8 bit displacement field
000013FC 2803 458 MOVE.L D3,D4
000013FE E14C 459 LSL.W #8,D4
00001400 E04C 460 LSR.W #8,D4 *Holds displacement value
00001402 C87C 00FF 461 AND.W #$00FF,D4
00001406 462
00001406 B87C 0000 463 CMP.W #$00,D4
0000140A 6700 0020 464 BEQ DISP_16
0000140E B87C 00FF 465 CMP.W #$FF,D4
00001412 6700 0030 466 BEQ DISP_32
00001416 467
00001416 3A48 468 MOVEA.W A0,A5
00001418 3C0D 469 MOVE.W A5,D6 *Holds next instruction address
0000141A 4604 470 NOT.B D4
0000141C 5204 471 ADD.B #%01,D4
0000141E 472
0000141E 9C44 473 SUB.W D4,D6
00001420 3206 474 MOVE.W D6,D1
00001422 103C 0003 475 MOVE.B #3,D0
00001426 4E4F 476 TRAP #15
00001428 FFFF FFFF 477 SIMHALT
0000142C 478 DISP_16
0000142C 3818 479 MOVE.W (A0)+,D4
0000142E 2A48 480 MOVEA.L A0,A5
00001430 3C0D 481 MOVE.W A5,D6 *Holds next instruction address
00001432 4604 482 NOT.B D4
00001434 5204 483 ADD.B #%01,D4
00001436 484
00001436 9C44 485 SUB.W D4,D6
00001438 3206 486 MOVE.W D6,D1
0000143A 103C 0003 487 MOVE.B #3,D0
0000143E 4E4F 488 TRAP #15
00001440 FFFF FFFF 489 SIMHALT
00001444 490 DISP_32
00001444 2818 491 MOVE.L (A0)+,D4
00001446 2A48 492 MOVEA.L A0,A5
00001448 3C0D 493 MOVE.W A5,D6 *Holds next instruction address
0000144A 4604 494 NOT.B D4
0000144C 5204 495 ADD.B #%01,D4
0000144E 496
0000144E 9C44 497 SUB.W D4,D6
00001450 3206 498 MOVE.W D6,D1
00001452 103C 0003 499 MOVE.B #3,D0
00001456 4E4F 500 TRAP #15
00001458 FFFF FFFF 501 SIMHALT
0000145C 502 OP_10 *OR,SUB
0000145C 2803 503 MOVE.L D3,D4
0000145E E54C 504 LSL.W #2,D4
00001460 1C3C 000E 505 MOVE.B #14,D6
00001464 EC6C 506 LSR.W D6,D4
00001466 B83C 0000 507 CMP.B #%00,D4 *Check bits 13 and 12
0000146A 6700 000E 508 BEQ IS_OR
0000146E 509
0000146E B83C 0001 510 CMP.B #%01,D4
00001472 6700 00B0 511 BEQ IS_SUB
00001476 512
00001476 6000 05F2 513 BRA INVALID_OP
0000147A 514 IS_OR
0000147A 43F9 00001D41 515 LEA PRNT_OR,A1
00001480 103C 000E 516 MOVE.B #14,D0
00001484 4E4F 517 TRAP #15
00001486 518
00001486 2803 519 MOVE.L D3,D4
00001488 EF4C 520 LSL.W #7,D4
0000148A 1C3C 000D 521 MOVE.B #13,D6
0000148E EC6C 522 LSR.W D6,D4
00001490 523
00001490 524 * Destination is Dn
00001490 B83C 0000 525 CMP.B #%000,D4
00001494 6700 002E 526 BEQ OR_B_D
00001498 B83C 0001 527 CMP.B #%001,D4
0000149C 6700 0036 528 BEQ OR_W_D
000014A0 B83C 0002 529 CMP.B #%010,D4
000014A4 6700 003E 530 BEQ OR_L_D
000014A8 531
000014A8 B83C 0004 532 CMP.B #%100,D4
000014AC 6700 0046 533 BEQ OR_B
000014B0 B83C 0005 534 CMP.B #%101,D4
000014B4 6700 004E 535 BEQ OR_W
000014B8 B83C 0006 536 CMP.B #%110,D4
000014BC 6700 0056 537 BEQ OR_L
000014C0 538
000014C0 6000 05A8 539 BRA INVALID_OP
000014C4 540
000014C4 541
000014C4 542
000014C4 543
000014C4 544 * For these, handle EA first, then Data reg.
000014C4 545 OR_B_D
000014C4 4EB9 00001A34 546 JSR PRINT_B
000014CA 547 *Proceed to EA Subroutine
000014CA 4EB9 00001ACC 548 JSR ADDFORMAT_DATA_DEST_EA
000014D0 549
000014D0 FFFF FFFF 550 SIMHALT * Return to IO
000014D4 551
000014D4 552 OR_W_D
000014D4 4EB9 00001A46 553 JSR PRINT_W
000014DA 554 *Proceed to EA Subroutine
000014DA 4EB9 00001ACC 555 JSR ADDFORMAT_DATA_DEST_EA
000014E0 556
000014E0 FFFF FFFF 557 SIMHALT * Return to IO
000014E4 558 OR_L_D
000014E4 4EB9 00001A58 559 JSR PRINT_L
000014EA 560 *Proceed to EA Subroutine
000014EA 4EB9 00001ACC 561 JSR ADDFORMAT_DATA_DEST_EA
000014F0 562
000014F0 FFFF FFFF 563 SIMHALT * Return to IO
000014F4 564
000014F4 565
000014F4 566 * For these, handle Data reg first, then EA
000014F4 567 OR_B
000014F4 4EB9 00001A34 568 JSR PRINT_B
000014FA 569 *Proceed to EA Subroutine
000014FA 4EB9 00001AEE 570 JSR ADDFORMAT_EA_DEST_EA
00001500 FFFF FFFF 571 SIMHALT * Return to IO
00001504 572
00001504 573 OR_W
00001504 4EB9 00001A46 574 JSR PRINT_W
0000150A 575 *Proceed to EA Subroutine
0000150A 4EB9 00001AEE 576 JSR ADDFORMAT_EA_DEST_EA
00001510 FFFF FFFF 577 SIMHALT * Return to IO
00001514 578
00001514 579 OR_L
00001514 4EB9 00001A58 580 JSR PRINT_L
0000151A 581 *Proceed to EA Subroutine
0000151A 4EB9 00001AEE 582 JSR ADDFORMAT_EA_DEST_EA
00001520 FFFF FFFF 583 SIMHALT * Return to IO
00001524 584
00001524 585 IS_SUB
00001524 43F9 00001D5A 586 LEA PRNT_SUB,A1
0000152A 103C 000E 587 MOVE.B #14,D0
0000152E 4E4F 588 TRAP #15
00001530 589
00001530 2803 590 MOVE.L D3,D4
00001532 EF4C 591 LSL.W #7,D4
00001534 1C3C 000D 592 MOVE.B #13,D6
00001538 EC6C 593 LSR.W D6,D4
0000153A 594
0000153A 595 * Data register as destination;
0000153A B83C 0000 596 CMP.B #%000,D4
0000153E 6700 002A 597 BEQ SUB_B_D
00001542 B83C 0001 598 CMP.B #%001,D4
00001546 6700 0032 599 BEQ SUB_W_D
0000154A B83C 0002 600 CMP.B #%010,D4
0000154E 6700 003A 601 BEQ SUB_L_D
00001552 602
00001552 603 * EA as destination;
00001552 B83C 0004 604 CMP.B #%100,D4
00001556 6700 0042 605 BEQ SUB_B
0000155A B83C 0005 606 CMP.B #%101,D4
0000155E 6700 004A 607 BEQ SUB_W
00001562 B83C 0006 608 CMP.B #%110,D4
00001566 6700 0052 609 BEQ SUB_L
0000156A 610
0000156A 611
0000156A 612 * Handle EA, then Data Reg.
0000156A 613 SUB_B_D
0000156A 4EB9 00001A34 614 JSR PRINT_B
00001570 615 *Proceed to EA Subroutine
00001570 4EB9 00001ACC 616 JSR ADDFORMAT_DATA_DEST_EA
00001576 617
00001576 FFFF FFFF 618 SIMHALT * Return to IO
0000157A 619 SUB_W_D
0000157A 4EB9 00001A46 620 JSR PRINT_W
00001580 621 *Proceed to EA Subroutine
00001580 4EB9 00001ACC 622 JSR ADDFORMAT_DATA_DEST_EA
00001586 623
00001586 FFFF FFFF 624 SIMHALT * Return to IO
0000158A 625 SUB_L_D
0000158A 4EB9 00001A58 626 JSR PRINT_L
00001590 627 *Proceed to EA Subroutine
00001590 4EB9 00001ACC 628 JSR ADDFORMAT_DATA_DEST_EA
00001596 629
00001596 FFFF FFFF 630 SIMHALT * Return to IO
0000159A 631
0000159A 632
0000159A 633 * Handle Data reg, then EA
0000159A 634 SUB_B
0000159A 4EB9 00001A34 635 JSR PRINT_B
000015A0 636 *Proceed to EA Subroutine
000015A0 4EB9 00001AEE 637 JSR ADDFORMAT_EA_DEST_EA
000015A6 FFFF FFFF 638 SIMHALT * Return to IO
000015AA 639 SUB_W
000015AA 4EB9 00001A46 640 JSR PRINT_W
000015B0 641 *Proceed to EA Subroutine
000015B0 4EB9 00001AEE 642 JSR ADDFORMAT_EA_DEST_EA
000015B6 FFFF FFFF 643 SIMHALT * Return to IO
000015BA 644 SUB_L
000015BA 4EB9 00001A58 645 JSR PRINT_L
000015C0 646 *Proceed to EA Subroutine
000015C0 4EB9 00001AEE 647 JSR ADDFORMAT_EA_DEST_EA
000015C6 FFFF FFFF 648 SIMHALT * Return to IO
000015CA 649
000015CA 650
000015CA 651 OP_11
000015CA 2803 652 MOVE.L D3,D4
000015CC 1C3C 000C 653 MOVE.B #12,D6
000015D0 EC6C 654 LSR.W D6,D4
000015D2 655
000015D2 B83C 000C 656 CMP.B #%1100,D4 *AND
000015D6 6700 0016 657 BEQ OP_1100
000015DA 658
000015DA B83C 000D 659 CMP.B #%1101,D4 *ADD,ADDA
000015DE 6700 00B8 660 BEQ OP_1101
000015E2 661
000015E2 B83C 000E 662 CMP.B #%1110,D4 *LSL/LSR,ASL/ASR,ROL/ROR
000015E6 6700 01BA 663 BEQ OP_1110
000015EA 664
000015EA 6000 047E 665 BRA INVALID_OP
000015EE 666 OP_1100 *AND
000015EE 43F9 00001D56 667 LEA PRNT_AND,A1
000015F4 103C 000E 668 MOVE.B #14,D0
000015F8 4E4F 669 TRAP #15
000015FA 670
000015FA 2803 671 MOVE.L D3,D4
000015FC EF4C 672 LSL.W #7,D4
000015FE 1C3C 000D 673 MOVE.B #13,D6
00001602 EC6C 674 LSR.W D6,D4 *Get Opmode
00001604 675 *< ea > Dn -> Dn (Data reg destination)
00001604 B83C 0000 676 CMP.B #%000,D4
00001608 6700 002E 677 BEQ AND_B_D
0000160C B83C 0001 678 CMP.B #%001,D4
00001610 6700 0036 679 BEQ AND_W_D
00001614 B83C 0002 680 CMP.B #%010,D4
00001618 6700 003E 681 BEQ AND_L_D
0000161C 682 *Dn < ea > -> < ea > (EA destination)
0000161C B83C 0004 683 CMP.B #%100,D4
00001620 6700 0046 684 BEQ AND_B
00001624 B83C 0005 685 CMP.B #%101,D4
00001628 6700 004E 686 BEQ AND_W
0000162C B83C 0006 687 CMP.B #%110,D4
00001630 6700 0056 688 BEQ AND_L
00001634 689
00001634 6000 0434 690 BRA INVALID_OP
00001638 691
00001638 692 * Handle EA, then Data Reg.
00001638 693 AND_B_D
00001638 4EB9 00001A34 694 JSR PRINT_B
0000163E 695 *Proceed to EA Subroutine
0000163E 4EB9 00001ACC 696 JSR ADDFORMAT_DATA_DEST_EA
00001644 697
00001644 FFFF FFFF 698 SIMHALT * Return to IO
00001648 699
00001648 700 AND_W_D
00001648 4EB9 00001A46 701 JSR PRINT_W
0000164E 702 *Proceed to EA Subroutine
0000164E 4EB9 00001ACC 703 JSR ADDFORMAT_DATA_DEST_EA
00001654 704
00001654 FFFF FFFF 705 SIMHALT * Return to IO
00001658 706
00001658 707 AND_L_D
00001658 4EB9 00001A58 708 JSR PRINT_L
0000165E 709 *Proceed to EA Subroutine
0000165E 4EB9 00001ACC 710 JSR ADDFORMAT_DATA_DEST_EA
00001664 711
00001664 FFFF FFFF 712 SIMHALT * Return to IO
00001668 713
00001668 714
00001668 715 * Handle data reg, then EA
00001668 716 AND_B
00001668 4EB9 00001A34 717 JSR PRINT_B
0000166E 718 *Proceed to EA Subroutine
0000166E 4EB9 00001AEE 719 JSR ADDFORMAT_EA_DEST_EA
00001674 FFFF FFFF 720 SIMHALT * Return to IO
00001678 721
00001678 722 AND_W
00001678 4EB9 00001A46 723 JSR PRINT_W
0000167E 724 *Proceed to EA Subroutine
0000167E 4EB9 00001AEE 725 JSR ADDFORMAT_EA_DEST_EA
00001684 FFFF FFFF 726 SIMHALT * Return to IO
00001688 727
00001688 728 AND_L
00001688 4EB9 00001A58 729 JSR PRINT_L
0000168E 730 *Proceed to EA Subroutine
0000168E 4EB9 00001AEE 731 JSR ADDFORMAT_EA_DEST_EA
00001694 FFFF FFFF 732 SIMHALT * Return to IO
00001698 733
00001698 734
00001698 735
00001698 736 OP_1101 *ADD,ADDA
00001698 2803 737 MOVE.L D3,D4
0000169A EF4C 738 LSL.W #7,D4
0000169C 1C3C 000D 739 MOVE.B #13,D6
000016A0 EC6C 740 LSR.W D6,D4 *Get Opmode
000016A2 741
000016A2 742 *ADD Opmodes
000016A2 743 *< ea > Dn -> Dn (Dn is the destination; Print <ea> first, then data register)
000016A2 744 * Added new branches to differentiate between orders.
000016A2 B83C 0000 745 CMP.B #%000,D4
000016A6 6700 005A 746 BEQ ADD_B_D
000016AA B83C 0001 747 CMP.B #%001,D4
000016AE 6700 0066 748 BEQ ADD_W_D
000016B2 B83C 0002 749 CMP.B #%010,D4
000016B6 6700 0072 750 BEQ ADD_L_D
000016BA 751
000016BA 752
000016BA 753 *Dn < ea > -> < ea > (EA is the destination; Print data reg first, then <ea>)
000016BA B83C 0004 754 CMP.B #%100,D4
000016BE 6700 007E 755 BEQ ADD_B
000016C2 B83C 0005 756 CMP.B #%101,D4
000016C6 6700 008A 757 BEQ ADD_W
000016CA B83C 0006 758 CMP.B #%110,D4
000016CE 6700 0096 759 BEQ ADD_L
000016D2 760
000016D2 761
000016D2 762 *ADDA Opmodes
000016D2 B83C 0003 763 CMP.B #%011,D4
000016D6 6700 00A2 764 BEQ ADDA_W
000016DA B83C 0007 765 CMP.B #%111,D4
000016DE 6700 00AE 766 BEQ ADDA_L
000016E2 767
000016E2 768
000016E2 6000 0386 769 BRA INVALID_OP
000016E6 770
000016E6 771 IS_ADD
000016E6 43F9 00001D4D 772 LEA PRNT_ADD,A1
000016EC 103C 000E 773 MOVE.B #14,D0
000016F0 4E4F 774 TRAP #15
000016F2 4E75 775 RTS
000016F4 776 IS_ADDA
000016F4 43F9 00001D51 777 LEA PRNT_ADDA,A1
000016FA 103C 000E 778 MOVE.B #14,D0
000016FE 4E4F 779 TRAP #15
00001700 4E75 780 RTS
00001702 781
00001702 782 * For these, handle EA first, then Data reg.
00001702 783 ADD_B_D
00001702 4EB8 16E6 784 JSR IS_ADD
00001706 4EB9 00001A34 785 JSR PRINT_B
0000170C 786 * Handle operands
0000170C 4EB9 00001ACC 787 JSR ADDFORMAT_DATA_DEST_EA
00001712 788
00001712 FFFF FFFF 789 SIMHALT * Return to IO
00001716 790
00001716 791 ADD_W_D
00001716 4EB8 16E6 792 JSR IS_ADD
0000171A 4EB9 00001A46 793 JSR PRINT_W
00001720 794 * Handle operands
00001720 4EB9 00001ACC 795 JSR ADDFORMAT_DATA_DEST_EA
00001726 796
00001726 FFFF FFFF 797 SIMHALT * Return to IO
0000172A 798 ADD_L_D
0000172A 4EB8 16E6 799 JSR IS_ADD
0000172E 4EB9 00001A58 800 JSR PRINT_L
00001734 801 * Handle operands
00001734 4EB9 00001ACC 802 JSR ADDFORMAT_DATA_DEST_EA
0000173A 803
0000173A FFFF FFFF 804 SIMHALT * Return to IO
0000173E 805
0000173E 806
0000173E 807 * For these, handle data reg first, then EA.
0000173E 808 ADD_B
0000173E 4EB8 16E6 809 JSR IS_ADD
00001742 4EB9 00001A34 810 JSR PRINT_B
00001748 811 *Proceed to EA Subroutine
00001748 4EB9 00001AEE 812 JSR ADDFORMAT_EA_DEST_EA
0000174E FFFF FFFF 813 SIMHALT * Return to IO
00001752 814
00001752 815 ADD_W
00001752 4EB8 16E6 816 JSR IS_ADD
00001756 4EB9 00001A46 817 JSR PRINT_W
0000175C 818 *Proceed to EA Subroutine
0000175C 4EB9 00001AEE 819 JSR ADDFORMAT_EA_DEST_EA
00001762 FFFF FFFF 820 SIMHALT * Return to IO
00001766 821
00001766 822 ADD_L
00001766 4EB8 16E6 823 JSR IS_ADD
0000176A 4EB9 00001A58 824 JSR PRINT_L
00001770 825 *Proceed to EA Subroutine
00001770 4EB9 00001AEE 826 JSR ADDFORMAT_EA_DEST_EA
00001776 FFFF FFFF 827 SIMHALT * Return to IO
0000177A 828
0000177A 829
0000177A 830 * Destination must be An, so do data reg first, then EA
0000177A 831 ADDA_W
0000177A 4EB8 16F4 832 JSR IS_ADDA
0000177E 4EB9 00001A46 833 JSR PRINT_W
00001784 834 *Proceed to EA Subroutine
00001784 4EB9 00001AEE 835 JSR ADDFORMAT_EA_DEST_EA
0000178A FFFF FFFF 836 SIMHALT * Return to IO
0000178E 837
0000178E 838 ADDA_L
0000178E 4EB8 16F4 839 JSR IS_ADDA
00001792 4EB9 00001A58 840 JSR PRINT_L
00001798 841 *Proceed to EA Subroutine
00001798 4EB9 00001AEE 842 JSR ADDFORMAT_EA_DEST_EA
0000179E FFFF FFFF 843 SIMHALT * Return to IO
000017A2 844
000017A2 845
000017A2 846
000017A2 847 OP_1110 *LSL/LSR,ASL/ASR,ROL/ROR (ADDED: Using D2 to track Mem/Reg state (0 = Reg, 1 = Mem) (D2 only used in hex input tester, so good to use))
000017A2 848
000017A2 849 *Memory Shift Check bits 6,7
000017A2 2803 850 MOVE.L D3,D4
000017A4 E14C 851 LSL.W #8,D4
000017A6 7C0E 852 MOVE.L #14,D6
000017A8 EC6C 853 LSR.W D6,D4
000017AA 854
000017AA B83C 0003 855 CMP.B #%11,D4
000017AE 6600 0024 856 BNE REG
000017B2 857 *Memory Shift check bits 11,10,9
000017B2 2803 858 MOVE.L D3,D4
000017B4 E94C 859 LSL.W #4,D4
000017B6 1C3C 000D 860 MOVE.B #13,D6
000017BA EC6C 861 LSR.W D6,D4
000017BC 862
000017BC B83C 0000 863 CMP.B #%000,D4 *ASL/ASR
000017C0 6700 0064 864 BEQ A_MEM
000017C4 B83C 0001 865 CMP.B #%001,D4 *LSL,LSR
000017C8 6700 00DC 866 BEQ L_MEM
000017CC B83C 0003 867 CMP.B #%011,D4 *ROL/ROR
000017D0 6700 0154 868 BEQ R_MEM
000017D4 869
000017D4 870 *Register Shift check bits 4,3
000017D4 2803 871 REG MOVE.L D3,D4
000017D6 1C3C 000B 872 MOVE.B #11,D6
000017DA ED6C 873 LSL.W D6,D4
000017DC 1C3C 0011 874 MOVE.B #17,D6
000017E0 EC6C 875 LSR.W D6,D4
000017E2 876
000017E2 B83C 0000 877 CMP.B #%00,D4 *ASL/ASR
000017E6 6700 0016 878 BEQ A_REG
000017EA B83C 0001 879 CMP.B #%01,D4 *LSL/LSR
000017EE 6700 008E 880 BEQ L_REG
000017F2 B83C 0003 881 CMP.B #%11,D4 *ROL/ROR
000017F6 6700 0106 882 BEQ R_REG
000017FA 883
000017FA 884
000017FA 6000 026E 885 BRA INVALID_OP
000017FE 886
000017FE 887 *Check bit 8 to determine L/R shift
000017FE 888 A_REG
000017FE 4EB9 00001998 889 JSR RGHT_LFT
00001804 890
00001804 143C 0000 891 MOVE.B #0,D2 * SET D2 TO 0 TO KNOW IS REG
00001808 892
00001808 4286 893 CLR.L D6
0000180A 1C3C 0001 894 MOVE.B #01,D6
0000180E B83C 0000 895 CMP.B #%0,D4
00001812 6700 0036 896 BEQ IS_ASR
00001816 B83C 0001 897 CMP.B #%1,D4
0000181A 6700 0048 898 BEQ IS_ASL
0000181E 899
0000181E 6000 024A 900 BRA INVALID_OP
00001822 901 A_SIZE
00001822 6000 0180 902 BRA GET_SHFT_SIZE
00001826 903
00001826 904 A_MEM
00001826 4EB9 00001998 905 JSR RGHT_LFT
0000182C 906
0000182C 143C 0001 907 MOVE.B #1,D2 * SET D2 TO 1 TO KNOW IS MEM
00001830 908
00001830 4286 909 CLR.L D6
00001832 1C3C 0002 910 MOVE.B #02,D6
00001836 B83C 0000 911 CMP.B #%0,D4
0000183A 6700 000E 912 BEQ IS_ASR
0000183E B83C 0001 913 CMP.B #%1,D4
00001842 6700 0020 914 BEQ IS_ASL
00001846 915
00001846 FFFF FFFF 916 SIMHALT
0000184A 917
0000184A 918
0000184A 919 IS_ASR
0000184A 43F9 00001D62 920 LEA PRNT_ASR,A1
00001850 103C 000E 921 MOVE.B #14,D0
00001854 4E4F 922 TRAP #15
00001856 BC3C 0001 923 CMP.B #01,D6
0000185A 67C6 924 BEQ A_SIZE
0000185C 925
0000185C 6000 01A4 926 BRA DO_SHIFT_EA * FOR MEM ONES WITH NO SIZE ATTRIBUTE.
00001860 927
00001860 FFFF FFFF 928 SIMHALT
00001864 929 IS_ASL
00001864 43F9 00001D5E 930 LEA PRNT_ASL,A1
0000186A 103C 000E 931 MOVE.B #14,D0
0000186E 4E4F 932 TRAP #15
00001870 BC3C 0001 933 CMP.B #01,D6
00001874 67AC 934 BEQ A_SIZE
00001876 935
00001876 6000 018A 936 BRA DO_SHIFT_EA * FOR MEM ONES WITH NO SIZE ATTRIBUTE.
0000187A 937
0000187A FFFF FFFF 938 SIMHALT
0000187E 939
0000187E 940 L_REG
0000187E 4EB9 00001998 941 JSR RGHT_LFT
00001884 942
00001884 143C 0000 943 MOVE.B #0,D2 * SET D2 TO 0 TO KNOW IS REG
00001888 944
00001888 4286 945 CLR.L D6
0000188A 1C3C 0001 946 MOVE.B #01,D6
0000188E B83C 0000 947 CMP.B #%0,D4
00001892 6700 0036 948 BEQ IS_LSR
00001896 B83C 0001 949 CMP.B #%1,D4
0000189A 6700 0048 950 BEQ IS_LSL
0000189E 951
0000189E 6000 01CA 952 BRA INVALID_OP
000018A2 953 L_SIZE
000018A2 6000 0100 954 BRA GET_SHFT_SIZE
000018A6 955
000018A6 956 L_MEM
000018A6 4EB9 00001998 957 JSR RGHT_LFT
000018AC 958
000018AC 143C 0001 959 MOVE.B #1,D2 * SET D2 TO 1 TO KNOW IS MEM
000018B0 960
000018B0 4286 961 CLR.L D6
000018B2 1C3C 0002 962 MOVE.B #02,D6
000018B6 B83C 0000 963 CMP.B #%0,D4
000018BA 6700 000E 964 BEQ IS_LSR
000018BE B83C 0001 965 CMP.B #%1,D4
000018C2 6700 0020 966 BEQ IS_LSL
000018C6 FFFF FFFF 967 SIMHALT * Not needed; Should go to LSR/LSL?
000018CA 968
000018CA 969 IS_LSR
000018CA 43F9 00001D6A 970 LEA PRNT_LSR,A1
000018D0 103C 000E 971 MOVE.B #14,D0
000018D4 4E4F 972 TRAP #15
000018D6 BC3C 0001 973 CMP.B #01,D6
000018DA 67C6 974 BEQ L_SIZE
000018DC 975
000018DC 6000 0124 976 BRA DO_SHIFT_EA * FOR MEM ONES WITH NO SIZE ATTRIBUTE.
000018E0 977
000018E0 FFFF FFFF 978 SIMHALT
000018E4 979 IS_LSL
000018E4 43F9 00001D66 980 LEA PRNT_LSL,A1
000018EA 103C 000E 981 MOVE.B #14,D0
000018EE 4E4F 982 TRAP #15
000018F0 BC3C 0001 983 CMP.B #01,D6
000018F4 67AC 984 BEQ L_SIZE
000018F6 985
000018F6 6000 010A 986 BRA DO_SHIFT_EA * FOR MEM ONES WITH NO SIZE ATTRIBUTE.
000018FA 987
000018FA FFFF FFFF 988 SIMHALT
000018FE 989
000018FE 990
000018FE 991 R_REG
000018FE 4EB9 00001998 992 JSR RGHT_LFT
00001904 993
00001904 143C 0000 994 MOVE.B #0,D2 * SET D2 TO 0 TO KNOW IS REG
00001908 995
00001908 4286 996 CLR.L D6