sof/app/boards/intel_adsp/Kconfig.defconfig at c6567cea8c4aea220eb1a69344c0c94b0246d300 · serhiy-katsyuba-intel/sof · GitHub

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
# Common defaults for all Intel ADSP SOF targets
#
# SPDX-License-Identifier: BSD-3-Clause

# ---
# NOTICE! defconfig files cannot override settings that already have
#         a default set. Thus some settings (especially choice values with
#         a default), must be set in the board config files even if the value
#         is same for all Intel DSPs.
# ---

# SOF / IPC configuration
# -----------------------

config IPC4_BASE_FW_INTEL
	default y

# SOF / audio pipeline and module settings
# ----------------------------------------

config COMP_CHAIN_DMA
	default y

config COMP_KPB
	default y

config COMP_UP_DOWN_MIXER
	default y

config COMP_VOLUME_WINDOWS_FADE
	default y

config FAST_GET
	default y

config FORMAT_A_LAW
	default y

config FORMAT_FLOAT
	default y

config FORMAT_MU_LAW
	default y

config FORMAT_U8
	default y

config PCM_CONVERTER_FORMAT_A_LAW
	default y

config PCM_CONVERTER_FORMAT_FLOAT
	default y

config PCM_CONVERTER_FORMAT_MU_LAW
	default y

config PCM_CONVERTER_FORMAT_S16_C16_AND_S16_C32
	default y

config PCM_CONVERTER_FORMAT_S16_C32_AND_S24_C32
	default y

config PCM_CONVERTER_FORMAT_S16_C32_AND_S32_C32
	default y

config PCM_CONVERTER_FORMAT_S16_C32_AND_S16_C32
	default y

config PCM_CONVERTER_FORMAT_S24_C24_AND_S24_C32
	default y

config PCM_CONVERTER_FORMAT_S24_C32_AND_S24_C24
	default y

config PCM_CONVERTER_FORMAT_U8
	default y

config PIPELINE_2_0
	default y

# SOF / infrastructure
# ----------------------------------------

config L3_HEAP
	default y if ACE

config ZEPHYR_DP_SCHEDULER
	default y

config ZEPHYR_NATIVE_DRIVERS
	default y

# SOF / logging
# ----------------------------------------

config ZEPHYR_LOG
	default y

# Zephyr / device drivers
# ----------------------------------------

config CLOCK_CONTROL
	default y

# note: CONFIG_CLOCK_CONTROL_ADSP is enabled by default
# based on DT definition.

config DAI
	default y

config DAI_INTEL_DMIC
	default y

config DAI_INTEL_SSP
	default y

config INTEL_ADSP_IPC
	default y

config INTEL_ADSP_TIMER
	default y

config MM_DRV
	default y

config UAOL
	default n	# Temporarily disabled until a proper fix for SOFC2-1595 is merged.
#	default y if ACE


# # Zephyr / power settings
# ----------------------------------------

config PM
	default y

config PM_DEVICE
	default y

config PM_DEVICE_RUNTIME
	default y

config PM_DEVICE_SYSTEM_MANAGED
	default y

config POWER_DOMAIN
	default y

# note: POWER_DOMAIN_INTEL_ADSP will be set based on DT

# Zephyr / logging
# ----------------------------------------

config LOG_BACKEND_ADSP_MTRACE
	default y

config LOG_FUNC_NAME_PREFIX_ERR
	default y

config LOG_FUNC_NAME_PREFIX_WRN
	default y

config LOG_FUNC_NAME_PREFIX_INF
	default y

config LOG_FUNC_NAME_PREFIX_DBG
	default y

config LOG_CORE_ID_PREFIX
	default y

config LOG_TIMESTAMP_64BIT
	default y

# Zephyr / debugging
# ----------------------------------------

config ZTEST
	default SOF_BOOT_TEST_SUPPORTED && SOF_BOOT_TEST_ALLOWED

# Zephyr / debug slot manager
# ----------------------------------------

config INTEL_ADSP_DEBUG_SLOT_MANAGER
	default y