@@ -3935,7 +3935,7 @@ simde_mm256_loadu_si256 (void const * mem_addr) {
39353935SIMDE_FUNCTION_ATTRIBUTES
39363936simde__m256
39373937simde_mm256_loadu2_m128 (const float hiaddr [HEDLEY_ARRAY_PARAM (4 )], const float loaddr [HEDLEY_ARRAY_PARAM (4 )]) {
3938- #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 )
3938+ #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 ) && !defined( SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2 )
39393939 return _mm256_loadu2_m128 (hiaddr , loaddr );
39403940 #else
39413941 return
@@ -3951,7 +3951,7 @@ simde_mm256_loadu2_m128 (const float hiaddr[HEDLEY_ARRAY_PARAM(4)], const float
39513951SIMDE_FUNCTION_ATTRIBUTES
39523952simde__m256d
39533953simde_mm256_loadu2_m128d (const double hiaddr [HEDLEY_ARRAY_PARAM (2 )], const double loaddr [HEDLEY_ARRAY_PARAM (2 )]) {
3954- #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 )
3954+ #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 ) && !defined( SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2 )
39553955 return _mm256_loadu2_m128d (hiaddr , loaddr );
39563956 #else
39573957 return
@@ -3967,7 +3967,7 @@ simde_mm256_loadu2_m128d (const double hiaddr[HEDLEY_ARRAY_PARAM(2)], const doub
39673967SIMDE_FUNCTION_ATTRIBUTES
39683968simde__m256i
39693969simde_mm256_loadu2_m128i (const simde__m128i * hiaddr , const simde__m128i * loaddr ) {
3970- #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 )
3970+ #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 ) && !defined( SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2 )
39713971 return _mm256_loadu2_m128i (hiaddr , loaddr );
39723972 #else
39733973 return
@@ -5230,7 +5230,7 @@ simde_mm256_storeu_si256 (void* mem_addr, simde__m256i a) {
52305230SIMDE_FUNCTION_ATTRIBUTES
52315231void
52325232simde_mm256_storeu2_m128 (simde_float32 hi_addr [4 ], simde_float32 lo_addr [4 ], simde__m256 a ) {
5233- #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 )
5233+ #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 ) && !defined( SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2 )
52345234 _mm256_storeu2_m128 (hi_addr , lo_addr , a );
52355235 #else
52365236 simde_mm_storeu_ps (lo_addr , simde_mm256_castps256_ps128 (a ));
@@ -5245,7 +5245,7 @@ simde_mm256_storeu2_m128 (simde_float32 hi_addr[4], simde_float32 lo_addr[4], si
52455245SIMDE_FUNCTION_ATTRIBUTES
52465246void
52475247simde_mm256_storeu2_m128d (simde_float64 hi_addr [2 ], simde_float64 lo_addr [2 ], simde__m256d a ) {
5248- #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 )
5248+ #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 ) && !defined( SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2 )
52495249 _mm256_storeu2_m128d (hi_addr , lo_addr , a );
52505250 #else
52515251 simde_mm_storeu_pd (lo_addr , simde_mm256_castpd256_pd128 (a ));
@@ -5260,7 +5260,7 @@ simde_mm256_storeu2_m128d (simde_float64 hi_addr[2], simde_float64 lo_addr[2], s
52605260SIMDE_FUNCTION_ATTRIBUTES
52615261void
52625262simde_mm256_storeu2_m128i (simde__m128i * hi_addr , simde__m128i * lo_addr , simde__m256i a ) {
5263- #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 )
5263+ #if defined(SIMDE_X86_AVX_NATIVE ) && !defined(SIMDE_BUG_GCC_91341 ) && !defined( SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2 )
52645264 _mm256_storeu2_m128i (hi_addr , lo_addr , a );
52655265 #else
52665266 simde_mm_storeu_si128 (lo_addr , simde_mm256_castsi256_si128 (a ));
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