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| 1 | +From e2e43103c00b5f7ccedbdbdece0f622cb420b4a5 Mon Sep 17 00:00:00 2001 |
| 2 | +From: Daniel Golle <daniel@makrotopia.org> |
| 3 | +Date: Fri, 3 Oct 2025 12:53:10 +0100 |
| 4 | +Subject: [PATCH] mt7987: make SPI controller configurable |
| 5 | + |
| 6 | +Allow selecting the SPI controller used for SPIM-NAND or SPI-NOR boot |
| 7 | +devices (either SPI0 or SPI2). |
| 8 | + |
| 9 | +Signed-off-by: Daniel Golle <daniel@makrotopia.org> |
| 10 | +--- |
| 11 | + plat/mediatek/apsoc_common/Config.in | 1 + |
| 12 | + plat/mediatek/mt7987/Config.in | 29 +++++++++++++++++++++ |
| 13 | + plat/mediatek/mt7987/bl2/bl2.mk | 12 +++++++++ |
| 14 | + plat/mediatek/mt7987/bl2/bl2_dev_spi_nand.c | 10 ++++++- |
| 15 | + plat/mediatek/mt7987/platform.mk | 4 +-- |
| 16 | + 5 files changed, 53 insertions(+), 3 deletions(-) |
| 17 | + create mode 100644 plat/mediatek/mt7987/Config.in |
| 18 | + |
| 19 | +--- a/plat/mediatek/apsoc_common/Config.in |
| 20 | ++++ b/plat/mediatek/apsoc_common/Config.in |
| 21 | +@@ -783,6 +783,7 @@ config ENABLE_BL31_RUNTIME_LOG |
| 22 | + default 1 |
| 23 | + depends on _ENABLE_BL31_RUNTIME_LOG |
| 24 | + |
| 25 | ++source "plat/mediatek/mt7987/Config.in" |
| 26 | + source "plat/mediatek/mt7988/Config.in" |
| 27 | + |
| 28 | + endmenu # Platform configurations |
| 29 | +--- /dev/null |
| 30 | ++++ b/plat/mediatek/mt7987/Config.in |
| 31 | +@@ -0,0 +1,29 @@ |
| 32 | ++# SPDX-License-Identifier: BSD-3-Clause |
| 33 | ++# |
| 34 | ++# Copyright (c) 2025 Daniel Golle <daniel@makrotopia.org> |
| 35 | ++# |
| 36 | ++# MT7987 platform-specific configurations |
| 37 | ++# |
| 38 | ++ |
| 39 | ++if _PLAT_MT7987 |
| 40 | ++ |
| 41 | ++choice |
| 42 | ++ prompt "SPI controller" |
| 43 | ++ depends on (_BOOT_DEVICE_SPIM_NAND || _BOOT_DEVICE_SPI_NOR) |
| 44 | ++ default _SPIM_CTRL_0 if _BOOT_DEVICE_SPIM_NAND |
| 45 | ++ default _SPIM_CTRL_2 if _BOOT_DEVICE_SPI_NOR |
| 46 | ++ |
| 47 | ++ config _SPIM_CTRL_0 |
| 48 | ++ bool "0" |
| 49 | ++ |
| 50 | ++ config _SPIM_CTRL_2 |
| 51 | ++ bool "2" |
| 52 | ++ |
| 53 | ++endchoice |
| 54 | ++ |
| 55 | ++config SPIM_CTRL |
| 56 | ++ int |
| 57 | ++ default 0 if _SPIM_CTRL_0 |
| 58 | ++ default 2 if _SPIM_CTRL_2 |
| 59 | ++ |
| 60 | ++endif # _PLAT_MT7987 |
| 61 | +--- a/plat/mediatek/mt7987/bl2/bl2.mk |
| 62 | ++++ b/plat/mediatek/mt7987/bl2/bl2.mk |
| 63 | +@@ -91,7 +91,11 @@ endif # END OF BOOT_DEVICE = ram |
| 64 | + ifeq ($(BOOT_DEVICE),nor) |
| 65 | + $(eval $(call BL2_BOOT_NOR)) |
| 66 | + BL2_SOURCES += $(MTK_PLAT_SOC)/bl2/bl2_dev_spi_nor.c |
| 67 | ++ifeq ($(SPIM_CTRL),0) |
| 68 | ++DTS_NAME := mt7987-spi0 |
| 69 | ++else |
| 70 | + DTS_NAME := mt7987-spi2 |
| 71 | ++endif |
| 72 | + endif # END OF BOOTDEVICE = nor |
| 73 | + |
| 74 | + ifeq ($(BOOT_DEVICE),emmc) |
| 75 | +@@ -112,10 +116,18 @@ ifeq ($(BOOT_DEVICE),spim-nand) |
| 76 | + $(eval $(call BL2_BOOT_SPI_NAND,0,0)) |
| 77 | + BL2_SOURCES += $(MTK_PLAT_SOC)/bl2/bl2_dev_spi_nand.c |
| 78 | + NAND_TYPE ?= spim:2k+64 |
| 79 | ++ifeq ($(SPIM_CTRL),2) |
| 80 | ++DTS_NAME := mt7987-spi2 |
| 81 | ++else |
| 82 | + DTS_NAME := mt7987-spi0 |
| 83 | ++endif |
| 84 | + $(eval $(call BL2_BOOT_NAND_TYPE_CHECK,$(NAND_TYPE),spim:2k+64 spim:2k+128 spim:4k+256)) |
| 85 | + endif # END OF BOOTDEVICE = spim-nand |
| 86 | + |
| 87 | ++ifneq ($(SPIM_CTRL),) |
| 88 | ++BL2_CPPFLAGS += -DSPIM_CTRL=$(SPIM_CTRL) |
| 89 | ++endif |
| 90 | ++ |
| 91 | + ifeq ($(BROM_HEADER_TYPE),) |
| 92 | + $(error BOOT_DEVICE has invalid value. Please re-check.) |
| 93 | + endif |
| 94 | +--- a/plat/mediatek/mt7987/bl2/bl2_dev_spi_nand.c |
| 95 | ++++ b/plat/mediatek/mt7987/bl2/bl2_dev_spi_nand.c |
| 96 | +@@ -12,10 +12,18 @@ |
| 97 | + |
| 98 | + #define MTK_QSPI_SRC_CLK CB_MPLL_D2 |
| 99 | + |
| 100 | ++#if SPIM_CTRL == 0 |
| 101 | ++#define SELECTED_SPIM SPIM0 |
| 102 | ++#elif SPIM_CTRL == 2 |
| 103 | ++#define SELECTED_SPIM SPIM2 |
| 104 | ++#else |
| 105 | ++#error "Invalid SPI controller selection" |
| 106 | ++#endif |
| 107 | ++ |
| 108 | + uint32_t mtk_plat_get_qspi_src_clk(void) |
| 109 | + { |
| 110 | + /* config GPIO pinmux to spi mode */ |
| 111 | +- mtk_spi_gpio_init(SPIM0); |
| 112 | ++ mtk_spi_gpio_init(SELECTED_SPIM); |
| 113 | + |
| 114 | + /* select 208M clk */ |
| 115 | + mtk_spi_source_clock_select(MTK_QSPI_SRC_CLK); |
| 116 | +--- a/plat/mediatek/mt7987/platform.mk |
| 117 | ++++ b/plat/mediatek/mt7987/platform.mk |
| 118 | +@@ -56,8 +56,8 @@ include make_helpers/dep.mk |
| 119 | + |
| 120 | + $(call GEN_DEP_RULES,bl2,emicfg bl2_boot_ram bl2_boot_nand_nmbm bl2_dev_mmc bl2_plat_init bl2_plat_setup mt7987_gpio dtb) |
| 121 | + $(call MAKE_DEP,bl2,emicfg,DDR4_4BG_MODE DRAM_DEBUG_LOG DDR3_FREQ_2133 DDR3_FREQ_1866 DDR4_FREQ_3200 DDR4_FREQ_2666) |
| 122 | +-$(call MAKE_DEP,bl2,bl2_plat_init,BL2_COMPRESS) |
| 123 | +-$(call MAKE_DEP,bl2,bl2_plat_setup,BOOT_DEVICE TRUSTED_BOARD_BOOT BL32_TZRAM_BASE BL32_TZRAM_SIZE BL32_LOAD_OFFSET) |
| 124 | ++$(call MAKE_DEP,bl2,bl2_plat_init,BL2_COMPRESS SPIM_CTRL) |
| 125 | ++$(call MAKE_DEP,bl2,bl2_plat_setup,BOOT_DEVICE TRUSTED_BOARD_BOOT BL32_TZRAM_BASE BL32_TZRAM_SIZE BL32_LOAD_OFFSET SPIM_CTRL) |
| 126 | + $(call MAKE_DEP,bl2,bl2_dev_mmc,BOOT_DEVICE) |
| 127 | + $(call MAKE_DEP,bl2,bl2_boot_ram,RAM_BOOT_DEBUGGER_HOOK RAM_BOOT_UART_DL) |
| 128 | + $(call MAKE_DEP,bl2,bl2_boot_nand_nmbm,NMBM_MAX_RATIO NMBM_MAX_RESERVED_BLOCKS NMBM_DEFAULT_LOG_LEVEL) |
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