@@ -50,7 +50,7 @@ float float32_distance_l2_impl_rvv (const void *v1, const void *v2, int n, bool
5050 const float * b = (const float * )v2 ;
5151
5252 // We accumulate the results into a vector register
53- size_t vl = __riscv_vsetvl_e32m8 ( n );
53+ size_t vl = __riscv_vsetvlmax_e32m8 ( );
5454 vfloat32m8_t vl2 = __riscv_vfmv_v_f_f32m8 (0.0f , vl );
5555
5656 // Iterate by VL elements
@@ -90,7 +90,7 @@ float float32_distance_l1_rvv (const void *v1, const void *v2, int n) {
9090 const float * b = (const float * )v2 ;
9191
9292 // We accumulate the results into a vector register
93- size_t vl = __riscv_vsetvl_e32m8 ( n );
93+ size_t vl = __riscv_vsetvlmax_e32m8 ( );
9494 vfloat32m8_t vsad = __riscv_vfmv_v_f_f32m8 (0.0f , vl );
9595
9696 // Iterate by VL elements
@@ -122,7 +122,7 @@ float float32_distance_dot_rvv (const void *v1, const void *v2, int n) {
122122 const float * b = (const float * )v2 ;
123123
124124 // We accumulate the results into a vector register
125- size_t vl = __riscv_vsetvl_e32m8 ( n );
125+ size_t vl = __riscv_vsetvlmax_e32m8 ( );
126126 vfloat32m8_t vdot = __riscv_vfmv_v_f_f32m8 (0.0f , vl );
127127
128128 // Iterate by VL elements
@@ -153,7 +153,7 @@ float float32_distance_cosine_rvv (const void *v1, const void *v2, int n) {
153153 const float * b = (const float * )v2 ;
154154
155155 // Use LMUL=4, we have 8 registers to work with.
156- size_t vl = __riscv_vsetvl_e32m4 ( n );
156+ size_t vl = __riscv_vsetvlmax_e32m4 ( );
157157
158158 // Zero out the starting registers
159159 vfloat32m4_t vdot = __riscv_vfmv_v_f_f32m4 (0.0f , vl );
@@ -360,15 +360,15 @@ float bit1_distance_hamming_rvv (const void *v1, const void *v2, int n) {
360360 const uint8_t * b = (const uint8_t * )v2 ;
361361
362362 // We accumulate the results into a vector register
363- size_t vl = __riscv_vsetvl_e32m8 ( n );
363+ size_t vl = __riscv_vsetvlmax_e64m8 ( );
364364 vuint64m8_t vdistance = __riscv_vmv_s_x_u64m8 (0 , vl );
365365
366366 // Iterate by VL elements
367367 for (size_t i = n ; i > 0 ; i -= vl ) {
368368 // Use LMUL=8, we have 4 registers to work with.
369369 vl = __riscv_vsetvl_e64m8 (n );
370370
371- // Load the vectors into the registers and cast them into a u64
371+ // Load the vectors into the registers and cast them into a u64 inplace
372372 vuint64m8_t va = __riscv_vreinterpret_v_u8m8_u64m8 (__riscv_vle8_v_u8m8 (a , vl ));
373373 vuint64m8_t vb = __riscv_vreinterpret_v_u8m8_u64m8 (__riscv_vle8_v_u8m8 (b , vl ));
374374
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