@@ -130,36 +130,34 @@ additionalProperties: false
130130
131131examples :
132132 - |
133- #include <dt-bindings/clock/mt8195-clk.h>
134133 #include <dt-bindings/interrupt-controller/arm-gic.h>
135134 #include <dt-bindings/interrupt-controller/irq.h>
136- #include <dt-bindings/power/mt8195-power.h>
137135
138136 afe: mt8195-afe-pcm@10890000 {
139137 compatible = "mediatek,mt8195-audio";
140138 reg = <0x10890000 0x10000>;
141139 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
142140 mediatek,topckgen = <&topckgen>;
143- power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
141+ power-domains = <&spm 7>; //MT8195_POWER_DOMAIN_AUDIO
144142 clocks = <&clk26m>,
145- <&topckgen CLK_TOP_APLL1>,
146- <&topckgen CLK_TOP_APLL2>,
147- <&topckgen CLK_TOP_APLL12_DIV0>,
148- <&topckgen CLK_TOP_APLL12_DIV1>,
149- <&topckgen CLK_TOP_APLL12_DIV2>,
150- <&topckgen CLK_TOP_APLL12_DIV3>,
151- <&topckgen CLK_TOP_APLL12_DIV9>,
152- <&topckgen CLK_TOP_A1SYS_HP_SEL>,
153- <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
154- <&topckgen CLK_TOP_AUDIO_H_SEL>,
155- <&topckgen CLK_TOP_AUDIO_LOCAL_BUS_SEL>,
156- <&topckgen CLK_TOP_DPTX_M_SEL>,
157- <&topckgen CLK_TOP_I2SO1_M_SEL>,
158- <&topckgen CLK_TOP_I2SO2_M_SEL>,
159- <&topckgen CLK_TOP_I2SI1_M_SEL>,
160- <&topckgen CLK_TOP_I2SI2_M_SEL>,
161- <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>,
162- <&scp_adsp CLK_SCP_ADSP_AUDIODSP>;
143+ <&topckgen 163>, //CLK_TOP_APLL1
144+ <&topckgen 166>, //CLK_TOP_APLL2
145+ <&topckgen 233>, //CLK_TOP_APLL12_DIV0
146+ <&topckgen 234>, //CLK_TOP_APLL12_DIV1
147+ <&topckgen 235>, //CLK_TOP_APLL12_DIV2
148+ <&topckgen 236>, //CLK_TOP_APLL12_DIV3
149+ <&topckgen 238>, //CLK_TOP_APLL12_DIV9
150+ <&topckgen 100>, //CLK_TOP_A1SYS_HP_SEL
151+ <&topckgen 33>, //CLK_TOP_AUD_INTBUS_SEL
152+ <&topckgen 34>, //CLK_TOP_AUDIO_H_SEL
153+ <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS_SEL
154+ <&topckgen 98>, //CLK_TOP_DPTX_M_SEL
155+ <&topckgen 94>, //CLK_TOP_I2SO1_M_SEL
156+ <&topckgen 95>, //CLK_TOP_I2SO2_M_SEL
157+ <&topckgen 96>, //CLK_TOP_I2SI1_M_SEL
158+ <&topckgen 97>, //CLK_TOP_I2SI2_M_SEL
159+ <&infracfg_ao 50>, //CLK_INFRA_AO_AUDIO_26M_B
160+ <&scp_adsp 0>; //CLK_SCP_ADSP_AUDIODSP
163161 clock-names = "clk26m",
164162 "apll1_ck",
165163 "apll2_ck",
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