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Srinivas-Kandagatlavinodkoul
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soundwire: qcom: add runtime pm support
Add support to runtime PM using SoundWire clock stop Mode0 on supported controller instances and soft reset on instances that do not support clock stop. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220228172528.3489-2-srinivas.kandagatla@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Lines changed: 155 additions & 1 deletion

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drivers/soundwire/qcom.c

Lines changed: 155 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111
#include <linux/of.h>
1212
#include <linux/of_irq.h>
1313
#include <linux/of_device.h>
14+
#include <linux/pm_runtime.h>
1415
#include <linux/regmap.h>
1516
#include <linux/slab.h>
1617
#include <linux/slimbus.h>
@@ -20,6 +21,9 @@
2021
#include <sound/soc.h>
2122
#include "bus.h"
2223

24+
#define SWRM_COMP_SW_RESET 0x008
25+
#define SWRM_COMP_STATUS 0x014
26+
#define SWRM_FRM_GEN_ENABLED BIT(0)
2327
#define SWRM_COMP_HW_VERSION 0x00
2428
#define SWRM_COMP_CFG_ADDR 0x04
2529
#define SWRM_COMP_CFG_IRQ_LEVEL_OR_PULSE_MSK BIT(1)
@@ -29,6 +33,7 @@
2933
#define SWRM_COMP_PARAMS_RD_FIFO_DEPTH GENMASK(19, 15)
3034
#define SWRM_COMP_PARAMS_DOUT_PORTS_MASK GENMASK(4, 0)
3135
#define SWRM_COMP_PARAMS_DIN_PORTS_MASK GENMASK(9, 5)
36+
#define SWRM_COMP_MASTER_ID 0x104
3237
#define SWRM_INTERRUPT_STATUS 0x200
3338
#define SWRM_INTERRUPT_STATUS_RMSK GENMASK(16, 0)
3439
#define SWRM_INTERRUPT_STATUS_SLAVE_PEND_IRQ BIT(0)
@@ -111,6 +116,13 @@
111116
#define SWR_MAX_CMD_ID 14
112117
#define MAX_FIFO_RD_RETRY 3
113118
#define SWR_OVERFLOW_RETRY_COUNT 30
119+
#define SWRM_LINK_STATUS_RETRY_CNT 100
120+
121+
enum {
122+
MASTER_ID_WSA = 1,
123+
MASTER_ID_RX,
124+
MASTER_ID_TX
125+
};
114126

115127
struct qcom_swrm_port_config {
116128
u8 si;
@@ -159,6 +171,7 @@ struct qcom_swrm_ctrl {
159171
u32 slave_status;
160172
u32 wr_fifo_depth;
161173
u32 rd_fifo_depth;
174+
bool clock_stop_not_supported;
162175
};
163176

164177
struct qcom_swrm_data {
@@ -497,6 +510,7 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id)
497510
u32 i;
498511
int devnum;
499512
int ret = IRQ_HANDLED;
513+
clk_prepare_enable(swrm->hclk);
500514

501515
swrm->reg_read(swrm, SWRM_INTERRUPT_STATUS, &intr_sts);
502516
intr_sts_masked = intr_sts & swrm->intr_mask;
@@ -604,6 +618,7 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id)
604618
intr_sts_masked = intr_sts & swrm->intr_mask;
605619
} while (intr_sts_masked);
606620

621+
clk_disable_unprepare(swrm->hclk);
607622
return ret;
608623
}
609624

@@ -1017,6 +1032,15 @@ static int qcom_swrm_startup(struct snd_pcm_substream *substream,
10171032
struct snd_soc_dai *codec_dai;
10181033
int ret, i;
10191034

1035+
ret = pm_runtime_get_sync(ctrl->dev);
1036+
if (ret < 0 && ret != -EACCES) {
1037+
dev_err_ratelimited(ctrl->dev,
1038+
"pm_runtime_get_sync failed in %s, ret %d\n",
1039+
__func__, ret);
1040+
pm_runtime_put_noidle(ctrl->dev);
1041+
return ret;
1042+
}
1043+
10201044
sruntime = sdw_alloc_stream(dai->name);
10211045
if (!sruntime)
10221046
return -ENOMEM;
@@ -1044,6 +1068,9 @@ static void qcom_swrm_shutdown(struct snd_pcm_substream *substream,
10441068

10451069
sdw_release_stream(ctrl->sruntime[dai->id]);
10461070
ctrl->sruntime[dai->id] = NULL;
1071+
pm_runtime_mark_last_busy(ctrl->dev);
1072+
pm_runtime_put_autosuspend(ctrl->dev);
1073+
10471074
}
10481075

10491076
static const struct snd_soc_dai_ops qcom_swrm_pdm_dai_ops = {
@@ -1197,12 +1224,23 @@ static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl)
11971224
static int swrm_reg_show(struct seq_file *s_file, void *data)
11981225
{
11991226
struct qcom_swrm_ctrl *swrm = s_file->private;
1200-
int reg, reg_val;
1227+
int reg, reg_val, ret;
1228+
1229+
ret = pm_runtime_get_sync(swrm->dev);
1230+
if (ret < 0 && ret != -EACCES) {
1231+
dev_err_ratelimited(swrm->dev,
1232+
"pm_runtime_get_sync failed in %s, ret %d\n",
1233+
__func__, ret);
1234+
pm_runtime_put_noidle(swrm->dev);
1235+
}
12011236

12021237
for (reg = 0; reg <= SWR_MSTR_MAX_REG_ADDR; reg += 4) {
12031238
swrm->reg_read(swrm, reg, &reg_val);
12041239
seq_printf(s_file, "0x%.3x: 0x%.2x\n", reg, reg_val);
12051240
}
1241+
pm_runtime_mark_last_busy(swrm->dev);
1242+
pm_runtime_put_autosuspend(swrm->dev);
1243+
12061244

12071245
return 0;
12081246
}
@@ -1267,6 +1305,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
12671305
ctrl->bus.ops = &qcom_swrm_ops;
12681306
ctrl->bus.port_ops = &qcom_swrm_port_ops;
12691307
ctrl->bus.compute_params = &qcom_swrm_compute_params;
1308+
ctrl->bus.clk_stop_timeout = 300;
12701309

12711310
ret = qcom_swrm_get_port_config(ctrl);
12721311
if (ret)
@@ -1319,6 +1358,21 @@ static int qcom_swrm_probe(struct platform_device *pdev)
13191358
(ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff,
13201359
ctrl->version & 0xffff);
13211360

1361+
pm_runtime_set_autosuspend_delay(dev, 3000);
1362+
pm_runtime_use_autosuspend(dev);
1363+
pm_runtime_mark_last_busy(dev);
1364+
pm_runtime_set_active(dev);
1365+
pm_runtime_enable(dev);
1366+
1367+
/* Clk stop is not supported on WSA Soundwire masters */
1368+
if (ctrl->version <= 0x01030000) {
1369+
ctrl->clock_stop_not_supported = true;
1370+
} else {
1371+
ctrl->reg_read(ctrl, SWRM_COMP_MASTER_ID, &val);
1372+
if (val == MASTER_ID_WSA)
1373+
ctrl->clock_stop_not_supported = true;
1374+
}
1375+
13221376
#ifdef CONFIG_DEBUG_FS
13231377
ctrl->debugfs = debugfs_create_dir("qualcomm-sdw", ctrl->bus.debugfs);
13241378
debugfs_create_file("qualcomm-registers", 0400, ctrl->debugfs, ctrl,
@@ -1345,6 +1399,105 @@ static int qcom_swrm_remove(struct platform_device *pdev)
13451399
return 0;
13461400
}
13471401

1402+
static bool swrm_wait_for_frame_gen_enabled(struct qcom_swrm_ctrl *swrm)
1403+
{
1404+
int retry = SWRM_LINK_STATUS_RETRY_CNT;
1405+
int comp_sts;
1406+
1407+
do {
1408+
swrm->reg_read(swrm, SWRM_COMP_STATUS, &comp_sts);
1409+
1410+
if (comp_sts & SWRM_FRM_GEN_ENABLED)
1411+
return true;
1412+
1413+
usleep_range(500, 510);
1414+
} while (retry--);
1415+
1416+
dev_err(swrm->dev, "%s: link status not %s\n", __func__,
1417+
comp_sts && SWRM_FRM_GEN_ENABLED ? "connected" : "disconnected");
1418+
1419+
return false;
1420+
}
1421+
1422+
static int swrm_runtime_resume(struct device *dev)
1423+
{
1424+
struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
1425+
int ret;
1426+
1427+
clk_prepare_enable(ctrl->hclk);
1428+
1429+
if (ctrl->clock_stop_not_supported) {
1430+
reinit_completion(&ctrl->enumeration);
1431+
ctrl->reg_write(ctrl, SWRM_COMP_SW_RESET, 0x01);
1432+
usleep_range(100, 105);
1433+
1434+
qcom_swrm_init(ctrl);
1435+
1436+
usleep_range(100, 105);
1437+
if (!swrm_wait_for_frame_gen_enabled(ctrl))
1438+
dev_err(ctrl->dev, "link failed to connect\n");
1439+
1440+
/* wait for hw enumeration to complete */
1441+
wait_for_completion_timeout(&ctrl->enumeration,
1442+
msecs_to_jiffies(TIMEOUT_MS));
1443+
qcom_swrm_get_device_status(ctrl);
1444+
sdw_handle_slave_status(&ctrl->bus, ctrl->status);
1445+
} else {
1446+
ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);
1447+
ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR,
1448+
SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET);
1449+
1450+
ctrl->intr_mask |= SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
1451+
ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
1452+
ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
1453+
1454+
usleep_range(100, 105);
1455+
if (!swrm_wait_for_frame_gen_enabled(ctrl))
1456+
dev_err(ctrl->dev, "link failed to connect\n");
1457+
1458+
ret = sdw_bus_exit_clk_stop(&ctrl->bus);
1459+
if (ret < 0)
1460+
dev_err(ctrl->dev, "bus failed to exit clock stop %d\n", ret);
1461+
}
1462+
1463+
return 0;
1464+
}
1465+
1466+
static int __maybe_unused swrm_runtime_suspend(struct device *dev)
1467+
{
1468+
struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
1469+
int ret;
1470+
1471+
if (!ctrl->clock_stop_not_supported) {
1472+
/* Mask bus clash interrupt */
1473+
ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
1474+
ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
1475+
ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
1476+
/* Prepare slaves for clock stop */
1477+
ret = sdw_bus_prep_clk_stop(&ctrl->bus);
1478+
if (ret < 0 && ret != -ENODATA) {
1479+
dev_err(dev, "prepare clock stop failed %d", ret);
1480+
return ret;
1481+
}
1482+
1483+
ret = sdw_bus_clk_stop(&ctrl->bus);
1484+
if (ret < 0 && ret != -ENODATA) {
1485+
dev_err(dev, "bus clock stop failed %d", ret);
1486+
return ret;
1487+
}
1488+
}
1489+
1490+
clk_disable_unprepare(ctrl->hclk);
1491+
1492+
usleep_range(300, 305);
1493+
1494+
return 0;
1495+
}
1496+
1497+
static const struct dev_pm_ops swrm_dev_pm_ops = {
1498+
SET_RUNTIME_PM_OPS(swrm_runtime_suspend, swrm_runtime_resume, NULL)
1499+
};
1500+
13481501
static const struct of_device_id qcom_swrm_of_match[] = {
13491502
{ .compatible = "qcom,soundwire-v1.3.0", .data = &swrm_v1_3_data },
13501503
{ .compatible = "qcom,soundwire-v1.5.1", .data = &swrm_v1_5_data },
@@ -1359,6 +1512,7 @@ static struct platform_driver qcom_swrm_driver = {
13591512
.driver = {
13601513
.name = "qcom-soundwire",
13611514
.of_match_table = qcom_swrm_of_match,
1515+
.pm = &swrm_dev_pm_ops,
13621516
}
13631517
};
13641518
module_platform_driver(qcom_swrm_driver);

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