@@ -42,33 +42,25 @@ void regcache_sort_defaults(struct reg_default *defaults, unsigned int ndefaults
4242}
4343EXPORT_SYMBOL_GPL (regcache_sort_defaults );
4444
45- static int regcache_hw_init (struct regmap * map )
45+ static int regcache_count_cacheable_registers (struct regmap * map )
4646{
47- int i , j ;
48- int ret ;
49- int count ;
50- unsigned int reg , val ;
51- void * tmp_buf ;
52-
53- if (!map -> num_reg_defaults_raw )
54- return - EINVAL ;
47+ unsigned int count ;
5548
5649 /* calculate the size of reg_defaults */
57- for (count = 0 , i = 0 ; i < map -> num_reg_defaults_raw ; i ++ )
50+ count = 0 ;
51+ for (unsigned int i = 0 ; i < map -> num_reg_defaults_raw ; i ++ )
5852 if (regmap_readable (map , i * map -> reg_stride ) &&
5953 !regmap_volatile (map , i * map -> reg_stride ))
6054 count ++ ;
6155
62- /* all registers are unreadable or volatile, so just bypass */
63- if (!count ) {
64- map -> cache_bypass = true;
65- return 0 ;
66- }
56+ return count ;
57+ }
6758
68- map -> num_reg_defaults = count ;
69- map -> reg_defaults = kmalloc_objs (struct reg_default , count );
70- if (!map -> reg_defaults )
71- return - ENOMEM ;
59+ static int regcache_hw_init (struct regmap * map )
60+ {
61+ int ret ;
62+ unsigned int reg , val ;
63+ void * tmp_buf ;
7264
7365 if (!map -> reg_defaults_raw ) {
7466 bool cache_bypass = map -> cache_bypass ;
@@ -77,10 +69,8 @@ static int regcache_hw_init(struct regmap *map)
7769 /* Bypass the cache access till data read from HW */
7870 map -> cache_bypass = true;
7971 tmp_buf = kmalloc (map -> cache_size_raw , GFP_KERNEL );
80- if (!tmp_buf ) {
81- ret = - ENOMEM ;
82- goto err_free ;
83- }
72+ if (!tmp_buf )
73+ return - ENOMEM ;
8474 ret = regmap_raw_read (map , 0 , tmp_buf ,
8575 map -> cache_size_raw );
8676 map -> cache_bypass = cache_bypass ;
@@ -93,7 +83,7 @@ static int regcache_hw_init(struct regmap *map)
9383 }
9484
9585 /* fill the reg_defaults */
96- for (i = 0 , j = 0 ; i < map -> num_reg_defaults_raw ; i ++ ) {
86+ for (unsigned int i = 0 , j = 0 ; i < map -> num_reg_defaults_raw ; i ++ ) {
9787 reg = i * map -> reg_stride ;
9888
9989 if (!regmap_readable (map , reg ))
@@ -111,9 +101,9 @@ static int regcache_hw_init(struct regmap *map)
111101 ret = regmap_read (map , reg , & val );
112102 map -> cache_bypass = cache_bypass ;
113103 if (ret != 0 ) {
114- dev_err (map -> dev , "Failed to read %d : %d\n" ,
104+ dev_err (map -> dev , "Failed to read %x : %d\n" ,
115105 reg , ret );
116- goto err_free ;
106+ return ret ;
117107 }
118108 }
119109
@@ -123,15 +113,17 @@ static int regcache_hw_init(struct regmap *map)
123113 }
124114
125115 return 0 ;
116+ }
126117
127- err_free :
128- kfree ( map -> reg_defaults );
129-
130- return ret ;
118+ static void regcache_hw_exit ( struct regmap * map )
119+ {
120+ if ( map -> cache_free )
121+ kfree ( map -> reg_defaults_raw ) ;
131122}
132123
133124int regcache_init (struct regmap * map , const struct regmap_config * config )
134125{
126+ int count = 0 ;
135127 int ret ;
136128 int i ;
137129 void * tmp_buf ;
@@ -196,15 +188,18 @@ int regcache_init(struct regmap *map, const struct regmap_config *config)
196188 return - ENOMEM ;
197189 map -> reg_defaults = tmp_buf ;
198190 } else if (map -> num_reg_defaults_raw ) {
199- /* Some devices such as PMICs don't have cache defaults,
200- * we cope with this by reading back the HW registers and
201- * crafting the cache defaults by hand.
202- */
203- ret = regcache_hw_init (map );
204- if (ret < 0 )
205- return ret ;
191+ count = regcache_count_cacheable_registers (map );
192+ if (!count )
193+ map -> cache_bypass = true;
194+
195+ /* All registers are unreadable or volatile, so just bypass */
206196 if (map -> cache_bypass )
207197 return 0 ;
198+
199+ map -> num_reg_defaults = count ;
200+ map -> reg_defaults = kmalloc_objs (struct reg_default , count );
201+ if (!map -> reg_defaults )
202+ return - ENOMEM ;
208203 }
209204
210205 if (!map -> max_register_is_set && map -> num_reg_defaults_raw ) {
@@ -219,7 +214,18 @@ int regcache_init(struct regmap *map, const struct regmap_config *config)
219214 ret = map -> cache_ops -> init (map );
220215 map -> unlock (map -> lock_arg );
221216 if (ret )
222- goto err_free ;
217+ goto err_free_reg_defaults ;
218+ }
219+
220+ /*
221+ * Some devices such as PMICs don't have cache defaults,
222+ * we cope with this by reading back the HW registers and
223+ * crafting the cache defaults by hand.
224+ */
225+ if (count ) {
226+ ret = regcache_hw_init (map );
227+ if (ret )
228+ goto err_exit ;
223229 }
224230
225231 if (map -> cache_ops -> populate &&
@@ -229,21 +235,21 @@ int regcache_init(struct regmap *map, const struct regmap_config *config)
229235 ret = map -> cache_ops -> populate (map );
230236 map -> unlock (map -> lock_arg );
231237 if (ret )
232- goto err_exit ;
238+ goto err_free ;
233239 }
234240 return 0 ;
235241
242+ err_free :
243+ regcache_hw_exit (map );
236244err_exit :
237245 if (map -> cache_ops -> exit ) {
238246 dev_dbg (map -> dev , "Destroying %s cache\n" , map -> cache_ops -> name );
239247 map -> lock (map -> lock_arg );
240248 ret = map -> cache_ops -> exit (map );
241249 map -> unlock (map -> lock_arg );
242250 }
243- err_free :
251+ err_free_reg_defaults :
244252 kfree (map -> reg_defaults );
245- if (map -> cache_free )
246- kfree (map -> reg_defaults_raw );
247253
248254 return ret ;
249255}
@@ -255,9 +261,7 @@ void regcache_exit(struct regmap *map)
255261
256262 BUG_ON (!map -> cache_ops );
257263
258- kfree (map -> reg_defaults );
259- if (map -> cache_free )
260- kfree (map -> reg_defaults_raw );
264+ regcache_hw_exit (map );
261265
262266 if (map -> cache_ops -> exit ) {
263267 dev_dbg (map -> dev , "Destroying %s cache\n" ,
@@ -266,6 +270,8 @@ void regcache_exit(struct regmap *map)
266270 map -> cache_ops -> exit (map );
267271 map -> unlock (map -> lock_arg );
268272 }
273+
274+ kfree (map -> reg_defaults );
269275}
270276
271277/**
@@ -504,7 +510,7 @@ int regcache_sync_region(struct regmap *map, unsigned int min,
504510 bypass = map -> cache_bypass ;
505511
506512 name = map -> cache_ops -> name ;
507- dev_dbg (map -> dev , "Syncing %s cache from %d-%d \n" , name , min , max );
513+ dev_dbg (map -> dev , "Syncing %s cache from %#x-%#x \n" , name , min , max );
508514
509515 trace_regcache_sync (map , name , "start region" );
510516
@@ -835,13 +841,13 @@ static int regcache_sync_block_raw(struct regmap *map, void *block,
835841 unsigned int block_base , unsigned int start ,
836842 unsigned int end )
837843{
838- unsigned int i , val ;
839844 unsigned int regtmp = 0 ;
840845 unsigned int base = 0 ;
841846 const void * data = NULL ;
847+ unsigned int val ;
842848 int ret ;
843849
844- for (i = start ; i < end ; i ++ ) {
850+ for (unsigned int i = start ; i < end ; i ++ ) {
845851 regtmp = block_base + (i * map -> reg_stride );
846852
847853 if (!regcache_reg_present (cache_present , i ) ||
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