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ASoC: Intel: AVS - Audio DSP for cAVS
Merge series from Cezary Rojewski <cezary.rojewski@intel.com>: A continuation of cleanup work of Intel SST solutions found in sound/soc/intel/. With two major chapters released last year catpt [1] and removal of haswell solution [2], time has come for Skylake-driver. Througout 2019, 2020 and 2021 Skylake-driver has had many fixes applied and even attempts of refactors as seen in fundamental overhaul [3], IPC flow adjustments [4] and LARGE_CONFIG overhaul [5] series. Unfortunately, story repeats itself - problems are found within the core of a driver. Painting it with different colors does not change the fact that is it still a house of cards. As changes needed to address those issues would make Skylake solution incompatible with its previous revisions, a decision has been made to provide a new solution instead. In time it would deprecate and replace Skylake-driver. That solution has been called AVS - from AudioDSP architecture name: Audio-Voice-Speech. It is meant to provide support for the exact same range of platforms as its predecessor: SKL, KBL, AML and APL. Note: this series is dependent upon HDA-series [6] which exposes several codec-organization functions allowing for reduced code size on avs-driver side. Note: this series does not add fully functional driver as its size would get out of control. Here, focus is put on adding IPC protocol and code loading code.
2 parents 375a347 + 092cf7b commit c1156cc

19 files changed

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include/sound/hdaudio.h

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@@ -9,6 +9,7 @@
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
1213
#include <linux/pm_runtime.h>
1314
#include <linux/timecounter.h>
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#include <sound/core.h>
@@ -448,6 +449,8 @@ static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr)
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449450
#define snd_hdac_reg_writel(bus, addr, val) writel(val, addr)
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#define snd_hdac_reg_readl(bus, addr) readl(addr)
452+
#define snd_hdac_reg_writeq(bus, addr, val) writeq(val, addr)
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#define snd_hdac_reg_readq(bus, addr) readq(addr)
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/*
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* macros for easy use

include/sound/hdaudio_ext.h

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@@ -2,6 +2,8 @@
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#ifndef __SOUND_HDAUDIO_EXT_H
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#define __SOUND_HDAUDIO_EXT_H
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include <linux/iopoll.h>
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#include <sound/hdaudio.h>
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int snd_hdac_ext_bus_init(struct hdac_bus *bus, struct device *dev,
@@ -143,6 +145,54 @@ void snd_hdac_ext_bus_link_power(struct hdac_device *codec, bool enable);
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writew(((readw(addr + reg) & ~(mask)) | (val)), \
144146
addr + reg)
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148+
#define snd_hdac_adsp_writeb(chip, reg, value) \
149+
snd_hdac_reg_writeb(chip, (chip)->dsp_ba + (reg), value)
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#define snd_hdac_adsp_readb(chip, reg) \
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snd_hdac_reg_readb(chip, (chip)->dsp_ba + (reg))
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#define snd_hdac_adsp_writew(chip, reg, value) \
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snd_hdac_reg_writew(chip, (chip)->dsp_ba + (reg), value)
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#define snd_hdac_adsp_readw(chip, reg) \
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snd_hdac_reg_readw(chip, (chip)->dsp_ba + (reg))
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#define snd_hdac_adsp_writel(chip, reg, value) \
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snd_hdac_reg_writel(chip, (chip)->dsp_ba + (reg), value)
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#define snd_hdac_adsp_readl(chip, reg) \
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snd_hdac_reg_readl(chip, (chip)->dsp_ba + (reg))
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#define snd_hdac_adsp_writeq(chip, reg, value) \
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snd_hdac_reg_writeq(chip, (chip)->dsp_ba + (reg), value)
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#define snd_hdac_adsp_readq(chip, reg) \
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snd_hdac_reg_readq(chip, (chip)->dsp_ba + (reg))
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#define snd_hdac_adsp_updateb(chip, reg, mask, val) \
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snd_hdac_adsp_writeb(chip, reg, \
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(snd_hdac_adsp_readb(chip, reg) & ~(mask)) | (val))
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#define snd_hdac_adsp_updatew(chip, reg, mask, val) \
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snd_hdac_adsp_writew(chip, reg, \
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(snd_hdac_adsp_readw(chip, reg) & ~(mask)) | (val))
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#define snd_hdac_adsp_updatel(chip, reg, mask, val) \
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snd_hdac_adsp_writel(chip, reg, \
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(snd_hdac_adsp_readl(chip, reg) & ~(mask)) | (val))
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#define snd_hdac_adsp_updateq(chip, reg, mask, val) \
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snd_hdac_adsp_writeq(chip, reg, \
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(snd_hdac_adsp_readq(chip, reg) & ~(mask)) | (val))
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#define snd_hdac_adsp_readb_poll(chip, reg, val, cond, delay_us, timeout_us) \
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readb_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
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delay_us, timeout_us)
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#define snd_hdac_adsp_readw_poll(chip, reg, val, cond, delay_us, timeout_us) \
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readw_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
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delay_us, timeout_us)
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#define snd_hdac_adsp_readl_poll(chip, reg, val, cond, delay_us, timeout_us) \
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readl_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
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delay_us, timeout_us)
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#define snd_hdac_adsp_readq_poll(chip, reg, val, cond, delay_us, timeout_us) \
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readq_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
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delay_us, timeout_us)
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#define snd_hdac_stream_readb_poll(strm, reg, val, cond, delay_us, timeout_us) \
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readb_poll_timeout((strm)->sd_addr + AZX_REG_ ## reg, val, cond, \
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delay_us, timeout_us)
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#define snd_hdac_stream_readl_poll(strm, reg, val, cond, delay_us, timeout_us) \
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readl_poll_timeout((strm)->sd_addr + AZX_REG_ ## reg, val, cond, \
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delay_us, timeout_us)
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struct hdac_ext_device;
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include/sound/soc-dapm.h

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@@ -429,6 +429,7 @@ struct snd_soc_dapm_widget *snd_soc_dapm_new_control_unlocked(
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const struct snd_soc_dapm_widget *widget);
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int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm,
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struct snd_soc_dai *dai);
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void snd_soc_dapm_free_widget(struct snd_soc_dapm_widget *w);
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int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card);
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void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card);
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sound/soc/intel/Kconfig

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@@ -209,5 +209,17 @@ config SND_SOC_INTEL_KEEMBAY
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If you have a Intel Keembay platform then enable this option
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by saying Y or m.
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config SND_SOC_INTEL_AVS
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tristate "Intel AVS driver"
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depends on PCI && ACPI
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depends on COMMON_CLK
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select SND_SOC_ACPI
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select SND_HDA_EXT_CORE
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select SND_HDA_DSP_LOADER
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help
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Enable support for Intel(R) cAVS 1.5 platforms with DSP
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capabilities. This includes Skylake, Kabylake, Amberlake and
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Apollolake.
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# ASoC codec drivers
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source "sound/soc/intel/boards/Kconfig"

sound/soc/intel/Makefile

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@@ -7,6 +7,7 @@ obj-$(CONFIG_SND_SST_ATOM_HIFI2_PLATFORM) += atom/
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obj-$(CONFIG_SND_SOC_INTEL_CATPT) += catpt/
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obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON) += skylake/
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obj-$(CONFIG_SND_SOC_INTEL_KEEMBAY) += keembay/
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obj-$(CONFIG_SND_SOC_INTEL_AVS) += avs/
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# Machine support
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obj-$(CONFIG_SND_SOC) += boards/

sound/soc/intel/avs/Makefile

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# SPDX-License-Identifier: GPL-2.0-only
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snd-soc-avs-objs := dsp.o ipc.o messages.o utils.o core.o loader.o
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snd-soc-avs-objs += cldma.o
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obj-$(CONFIG_SND_SOC_INTEL_AVS) += snd-soc-avs.o

sound/soc/intel/avs/avs.h

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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
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*
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* Authors: Cezary Rojewski <cezary.rojewski@intel.com>
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* Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
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*/
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#ifndef __SOUND_SOC_INTEL_AVS_H
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#define __SOUND_SOC_INTEL_AVS_H
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#include <linux/device.h>
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#include <linux/firmware.h>
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#include <sound/hda_codec.h>
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#include <sound/hda_register.h>
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#include "messages.h"
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#include "registers.h"
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struct avs_dev;
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/*
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* struct avs_dsp_ops - Platform-specific DSP operations
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*
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* @power: Power on or off DSP cores
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* @reset: Enter or exit reset state on DSP cores
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* @stall: Stall or run DSP cores
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* @irq_handler: Top half of IPC servicing
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* @irq_thread: Bottom half of IPC servicing
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* @int_control: Enable or disable IPC interrupts
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*/
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struct avs_dsp_ops {
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int (* const power)(struct avs_dev *, u32, bool);
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int (* const reset)(struct avs_dev *, u32, bool);
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int (* const stall)(struct avs_dev *, u32, bool);
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irqreturn_t (* const irq_handler)(int, void *);
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irqreturn_t (* const irq_thread)(int, void *);
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void (* const int_control)(struct avs_dev *, bool);
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int (* const load_basefw)(struct avs_dev *, struct firmware *);
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int (* const load_lib)(struct avs_dev *, struct firmware *, u32);
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int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32);
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};
42+
43+
#define avs_dsp_op(adev, op, ...) \
44+
((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__))
45+
46+
#define AVS_PLATATTR_CLDMA BIT_ULL(0)
47+
#define AVS_PLATATTR_IMR BIT_ULL(1)
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49+
#define avs_platattr_test(adev, attr) \
50+
((adev)->spec->attributes & AVS_PLATATTR_##attr)
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/* Platform specific descriptor */
53+
struct avs_spec {
54+
const char *name;
55+
56+
const struct avs_dsp_ops *const dsp_ops;
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struct avs_fw_version min_fw_version; /* anything below is rejected */
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59+
const u32 core_init_mask; /* used during DSP boot */
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const u64 attributes; /* bitmask of AVS_PLATATTR_* */
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const u32 sram_base_offset;
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const u32 sram_window_size;
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const u32 rom_status;
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};
65+
66+
struct avs_fw_entry {
67+
char *name;
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const struct firmware *fw;
69+
70+
struct list_head node;
71+
};
72+
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/*
74+
* struct avs_dev - Intel HD-Audio driver data
75+
*
76+
* @dev: PCI device
77+
* @dsp_ba: DSP bar address
78+
* @spec: platform-specific descriptor
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* @fw_cfg: Firmware configuration, obtained through FW_CONFIG message
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* @hw_cfg: Hardware configuration, obtained through HW_CONFIG message
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* @mods_info: Available module-types, obtained through MODULES_INFO message
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* @mod_idas: Module instance ID pool, one per module-type
83+
* @modres_mutex: For synchronizing any @mods_info updates
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* @ppl_ida: Pipeline instance ID pool
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* @fw_list: List of libraries loaded, including base firmware
86+
*/
87+
struct avs_dev {
88+
struct hda_bus base;
89+
struct device *dev;
90+
91+
void __iomem *dsp_ba;
92+
const struct avs_spec *spec;
93+
struct avs_ipc *ipc;
94+
95+
struct avs_fw_cfg fw_cfg;
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struct avs_hw_cfg hw_cfg;
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struct avs_mods_info *mods_info;
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struct ida **mod_idas;
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struct mutex modres_mutex;
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struct ida ppl_ida;
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struct list_head fw_list;
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int *core_refs; /* reference count per core */
103+
char **lib_names;
104+
105+
struct completion fw_ready;
106+
};
107+
108+
/* from hda_bus to avs_dev */
109+
#define hda_to_avs(hda) container_of(hda, struct avs_dev, base)
110+
/* from hdac_bus to avs_dev */
111+
#define hdac_to_avs(hdac) hda_to_avs(to_hda_bus(hdac))
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/* from device to avs_dev */
113+
#define to_avs_dev(dev) \
114+
({ \
115+
struct hdac_bus *__bus = dev_get_drvdata(dev); \
116+
hdac_to_avs(__bus); \
117+
})
118+
119+
int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power);
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int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset);
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int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall);
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int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask);
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int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask);
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125+
/* Inter Process Communication */
126+
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struct avs_ipc_msg {
128+
union {
129+
u64 header;
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union avs_global_msg glb;
131+
union avs_reply_msg rsp;
132+
};
133+
void *data;
134+
size_t size;
135+
};
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/*
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* struct avs_ipc - DSP IPC context
139+
*
140+
* @dev: PCI device
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* @rx: Reply message cache
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* @default_timeout_ms: default message timeout in MS
143+
* @ready: whether firmware is ready and communication is open
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* @rx_completed: whether RX for previously sent TX has been received
145+
* @rx_lock: for serializing manipulation of rx_* fields
146+
* @msg_lock: for synchronizing request handling
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* @done_completion: DONE-part of IPC i.e. ROM and ACKs from FW
148+
* @busy_completion: BUSY-part of IPC i.e. receiving responses from FW
149+
*/
150+
struct avs_ipc {
151+
struct device *dev;
152+
153+
struct avs_ipc_msg rx;
154+
u32 default_timeout_ms;
155+
bool ready;
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bool rx_completed;
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spinlock_t rx_lock;
159+
struct mutex msg_mutex;
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struct completion done_completion;
161+
struct completion busy_completion;
162+
};
163+
164+
#define AVS_EIPC EREMOTEIO
165+
/*
166+
* IPC handlers may return positive value (firmware error code) what denotes
167+
* successful HOST <-> DSP communication yet failure to process specific request.
168+
*
169+
* Below macro converts returned value to linux kernel error code.
170+
* All IPC callers MUST use it as soon as firmware error code is consumed.
171+
*/
172+
#define AVS_IPC_RET(ret) \
173+
(((ret) <= 0) ? (ret) : -AVS_EIPC)
174+
175+
static inline void avs_ipc_err(struct avs_dev *adev, struct avs_ipc_msg *tx,
176+
const char *name, int error)
177+
{
178+
/*
179+
* If IPC channel is blocked e.g.: due to ongoing recovery,
180+
* -EPERM error code is expected and thus it's not an actual error.
181+
*/
182+
if (error == -EPERM)
183+
dev_dbg(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
184+
tx->glb.primary, tx->glb.ext.val, error);
185+
else
186+
dev_err(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
187+
tx->glb.primary, tx->glb.ext.val, error);
188+
}
189+
190+
irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id);
191+
irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id);
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void avs_dsp_process_response(struct avs_dev *adev, u64 header);
193+
int avs_dsp_send_msg_timeout(struct avs_dev *adev,
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struct avs_ipc_msg *request,
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struct avs_ipc_msg *reply, int timeout);
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int avs_dsp_send_msg(struct avs_dev *adev,
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struct avs_ipc_msg *request, struct avs_ipc_msg *reply);
198+
int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev,
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struct avs_ipc_msg *request, int timeout);
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int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request);
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void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable);
202+
int avs_ipc_init(struct avs_ipc *ipc, struct device *dev);
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void avs_ipc_block(struct avs_ipc *ipc);
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/* Firmware resources management */
206+
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int avs_get_module_entry(struct avs_dev *adev, const guid_t *uuid, struct avs_module_entry *entry);
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int avs_get_module_id_entry(struct avs_dev *adev, u32 module_id, struct avs_module_entry *entry);
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int avs_get_module_id(struct avs_dev *adev, const guid_t *uuid);
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bool avs_is_module_ida_empty(struct avs_dev *adev, u32 module_id);
211+
212+
int avs_module_info_init(struct avs_dev *adev, bool purge);
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void avs_module_info_free(struct avs_dev *adev);
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int avs_module_id_alloc(struct avs_dev *adev, u16 module_id);
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void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id);
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int avs_request_firmware(struct avs_dev *adev, const struct firmware **fw_p, const char *name);
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void avs_release_last_firmware(struct avs_dev *adev);
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void avs_release_firmwares(struct avs_dev *adev);
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int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id,
221+
u8 core_id, u8 domain, void *param, u32 param_size,
222+
u16 *instance_id);
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void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id,
224+
u8 ppl_instance_id, u8 core_id);
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int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
226+
bool lp, u16 attributes, u8 *instance_id);
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int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id);
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/* Firmware loading */
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void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable);
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void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable);
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void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable);
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int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge);
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int avs_dsp_first_boot_firmware(struct avs_dev *adev);
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int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw);
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int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);
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int avs_cldma_transfer_modules(struct avs_dev *adev, bool load,
241+
struct avs_module_entry *mods, u32 num_mods);
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int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw);
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int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);
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int avs_hda_transfer_modules(struct avs_dev *adev, bool load,
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struct avs_module_entry *mods, u32 num_mods);
246+
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#endif /* __SOUND_SOC_INTEL_AVS_H */

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