config: set cached and uncached aliases for affected platforms

Set cached and uncached address aliases for all Intel ADSP platforms,
supported by Zephyr.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>

Author: lyakh

config/mtl.toml

@@ -3,6 +3,7 @@ version = [3, 0]
 [adsp]
 name = "mtl"
 image_size = "0x2C0000" # (22) bank * 128KB
+alias_mask = "0xE0000000"
 
 [[adsp.mem_zone]]
 type = "ROM"
@@ -17,6 +18,13 @@ type = "SRAM"
 base = "0xa00f0000"
 size = "0x100000"
 
+[[adsp.mem_alias]]
+type = "uncached"
+base = "0x40000000"
+[[adsp.mem_alias]]
+type = "cached"
+base = "0xA0000000"
+
 [cse]
 partition_name = "ADSP"
 [[cse.entry]]

config/tgl-h-cavs.toml

@@ -3,6 +3,7 @@ version = [2, 5]
 [adsp]
 name = "tgl"
 image_size = "0x1F0000" # (30 + 1) bank * 64KB
+alias_mask = "0xE0000000"
 
 [[adsp.mem_zone]]
 type = "ROM"
@@ -21,6 +22,13 @@ type = "LP-SRAM"
 base = "0xBE800000"
 size = "0x40"
 
+[[adsp.mem_alias]]
+type = "uncached"
+base = "0x9E000000"
+[[adsp.mem_alias]]
+type = "cached"
+base = "0xBE000000"
+
 [cse]
 partition_name = "ADSP"
 [[cse.entry]]

config/tgl-h.toml

@@ -3,6 +3,7 @@ version = [2, 5]
 [adsp]
 name = "tgl"
 image_size = "0x1F0000" # (30 + 1) bank * 64KB
+alias_mask = "0xE0000000"
 
 [[adsp.mem_zone]]
 type = "ROM"
@@ -17,6 +18,13 @@ type = "SRAM"
 base = "0xBE040000"
 size = "0x100000"
 
+[[adsp.mem_alias]]
+type = "uncached"
+base = "0x9E000000"
+[[adsp.mem_alias]]
+type = "cached"
+base = "0xBE000000"
+
 [cse]
 partition_name = "ADSP"
 [[cse.entry]]

config/tgl.toml

@@ -3,6 +3,7 @@ version = [2, 5]
 [adsp]
 name = "tgl"
 image_size = "0x2F0000" # (46 + 1) bank * 64KB
+alias_mask = "0xE0000000"
 
 [[adsp.mem_zone]]
 type = "ROM"
@@ -17,6 +18,13 @@ type = "SRAM"
 base = "0xBE040000"
 size = "0x100000"
 
+[[adsp.mem_alias]]
+type = "uncached"
+base = "0x9E000000"
+[[adsp.mem_alias]]
+type = "cached"
+base = "0xBE000000"
+
 [cse]
 partition_name = "ADSP"
 [[cse.entry]]