intel: ssp: do not read data directly if DMA is active

If DMA is active, do not read data directly from the SSP
RX fifo.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
(cherry picked from commit e94071f)
(cherry picked from commit 736af01)

Author: kv2019i

src/drivers/intel/ssp/ssp.c

@@ -71,9 +71,18 @@ static void ssp_empty_rx_fifo(struct dai *dai)
 	uint64_t sample_ticks = clock_ticks_per_sample(PLATFORM_DEFAULT_CLOCK,
 						       ssp->params.fsync_rate);
 	uint32_t retry = SSP_RX_FLUSH_RETRY_MAX;
+	bool direct_reads = ssp->state[DAI_DIR_CAPTURE] <= COMP_STATE_PREPARE;
 	uint32_t entries;
 	uint32_t i;
 
+#if CONFIG_DMA_SUSPEND_DRAIN
+	/*
+	 * In drain mode, DMA is stopped before DAI, so flush must be
+	 * always done with direct register read.
+	 */
+	direct_reads = true;
+#endif
+
 	/*
 	 * To make sure all the RX FIFO entries are read out for the flushing,
 	 * we need to wait a minimal SSP port delay after entries are all read,
@@ -84,9 +93,12 @@ static void ssp_empty_rx_fifo(struct dai *dai)
 	while ((ssp_read(dai, SSSR) & SSSR_RNE) && retry--) {
 		entries = SSCR3_RFL_VAL(ssp_read(dai, SSCR3));
 		dai_dbg(dai, "ssp_empty_rx_fifo(), before flushing, entries %d", entries);
-		for (i = 0; i < entries + 1; i++)
-			/* read to try empty fifo */
-			ssp_read(dai, SSDR);
+
+		/* let DMA consume data or read RX FIFO directly */
+		if (direct_reads) {
+			for (i = 0; i < entries + 1; i++)
+				ssp_read(dai, SSDR);
+		}
 
 		/* wait to get valid fifo status and re-check */
 		wait_delay(sample_ticks);