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dcpleunglgirdwood
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west.yml: update zephyr to 05a3f62f445
Total of 1145 commits. Changes include: a5a9ff4c28c xtensa: handle instruction TLB multi-hit exception 9b9e9ebde77 xtensa: mmu: data TLB multi-hit only handle exception address 599df95875c xtensa: return back to interrupted thread for certain exceptions 27e48026215 xtensa: remove unnecessary setting of is_fatal_error during exc 8d072e85b1e ipc: intel_adsp: fix inverted sync wait condition ed4cec2d220 xtensa: ptables: doxygen doc 744a7f4daf1 xtensa: mmu: do doxygen for functions 50e980d9a83 xtensa: mmu: halt system if not enough L2 tables during boot 82b7d94d452 xtensa: mmu: add debug logs on page table allocations 0777dbea028 xtensa: mmu: assert when L2 table allocation fails during dup 71262d0e075 arch: xtensa: avoid the use of "sanity check" term Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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west.yml

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@@ -43,7 +43,7 @@ manifest:
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- name: zephyr
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repo-path: zephyr
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revision: c1a2b3be459d4f34d31ae54774fd57e96438d237
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revision: 05a3f62f4456b25f1830eeb1a09c39e4a2a8bc39
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remote: zephyrproject
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# Import some projects listed in zephyr/west.yml@revision

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