build: remove more XTOS left-overs

Remove conditional __ZEPHYR__ core parts. Most files are now only
Zephyr or only host.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>

Author: lyakh

src/init/init.c

@@ -90,8 +90,6 @@ static inline void lp_sram_unpack(void)
 
 #if CONFIG_MULTICORE
 
-#ifdef __ZEPHYR__
-
 static bool check_restore(void)
 {
 	struct idc *idc = *idc_get();
@@ -107,75 +105,11 @@ static bool check_restore(void)
 
 static inline int secondary_core_restore(void) { return 0; };
 
-#else
-
-static bool check_restore(void)
-{
-	struct idc *idc = *idc_get();
-	struct task *task = *task_main_get();
-	struct notify *notifier = *arch_notify_get();
-	struct schedulers *schedulers = *arch_schedulers_get();
-
-	/* check whether basic core structures has been already allocated. If they
-	 * are available in memory, it means that this is not cold boot and memory
-	 * has not been powered off.
-	 */
-	return !!idc && !!task && !!notifier && !!schedulers;
-}
-
-static int secondary_core_restore(void)
-{
-	int err;
-
-	trace_point(TRACE_BOOT_PLATFORM_IRQ);
-
-	/* initialize interrupts */
-	platform_interrupt_init();
-
-	/* As the memory was not turned of in D0->D0ix and basic structures are
-	 * already allocated, in restore process (D0ix->D0) we have only to
-	 * register and enable required interrupts (it is done in
-	 * schedulers_restore() and idc_restore()).
-	 */
-
-	/* restore schedulers i.e. register and enable scheduler interrupts */
-	trace_point(TRACE_BOOT_PLATFORM_SCHED);
-	err = schedulers_restore();
-	if (err < 0)
-		return err;
-
-	/* restore idc i.e. register and enable idc interrupts */
-	trace_point(TRACE_BOOT_PLATFORM_IDC);
-	err = idc_restore();
-	if (err < 0)
-		return err;
-
-	trace_point(TRACE_BOOT_PLATFORM);
-
-	/* In restore case (D0ix->D0 flow) we do not have to invoke here
-	 * schedule_task(*task_main_get(), 0, UINT64_MAX) as it is done in
-	 * cold boot process (see end of secondary_core_init() function),
-	 * because in restore case memory has not been powered off and task_main
-	 * is already added into scheduler list.
-	 */
-	while (1)
-		wait_for_interrupt(0);
-}
-
-#endif
-
 __cold int secondary_core_init(struct sof *sof)
 {
 	int err;
 	struct ll_schedule_domain *dma_domain;
 
-#ifndef __ZEPHYR__
-	/* init architecture */
-	trace_point(TRACE_BOOT_ARCH);
-	err = arch_init();
-	if (err < 0)
-		sof_panic(SOF_IPC_PANIC_ARCH);
-#endif
 	/* check whether we are in a cold boot process or not (e.g. D0->D0ix
 	 * flow when primary core disables all secondary cores). If not, we do
 	 * not have allocate basic structures like e.g. schedulers, notifier,
@@ -188,13 +122,6 @@ __cold int secondary_core_init(struct sof *sof)
 	trace_point(TRACE_BOOT_SYS_NOTIFIER);
 	init_system_notify(sof);
 
-#ifndef __ZEPHYR__
-	/* interrupts need to be initialized before any usage */
-	trace_point(TRACE_BOOT_PLATFORM_IRQ);
-	platform_interrupt_init();
-
-	scheduler_init_edf();
-#endif
 	trace_point(TRACE_BOOT_PLATFORM_SCHED);
 	scheduler_init_ll(timer_domain_get());
 
@@ -227,11 +154,6 @@ __cold int secondary_core_init(struct sof *sof)
 
 	trace_point(TRACE_BOOT_PLATFORM);
 
-#ifndef __ZEPHYR__
-	/* task initialized in edf_scheduler_init */
-	schedule_task(*task_main_get(), 0, UINT64_MAX);
-#endif
-
 	return err;
 }
 
@@ -273,20 +195,6 @@ __cold static int primary_core_init(int argc, char *argv[], struct sof *sof)
 	sof->argc = argc;
 	sof->argv = argv;
 
-#ifndef __ZEPHYR__
-	/* init architecture */
-	trace_point(TRACE_BOOT_ARCH);
-	if (arch_init() < 0)
-		sof_panic(SOF_IPC_PANIC_ARCH);
-
-	/* initialise system services */
-	trace_point(TRACE_BOOT_SYS_HEAP);
-	platform_init_memmap(sof);
-	init_heap(sof);
-
-	interrupt_init(sof);
-#endif /* __ZEPHYR__ */
-
 #if defined(CONFIG_ZEPHYR_LOG) && !defined(CONFIG_LOG_MODE_MINIMAL)
 	log_set_timestamp_func(default_get_timestamp,
 			       sys_clock_hw_cycles_per_sec());
@@ -338,27 +246,6 @@ __cold static int primary_core_init(int argc, char *argv[], struct sof *sof)
 	return task_main_start(sof);
 }
 
-#ifndef __ZEPHYR__
-int main(int argc, char *argv[])
-{
-	int err = 0;
-
-	trace_point(TRACE_BOOT_START);
-
-	if (cpu_get_id() == PLATFORM_PRIMARY_CORE_ID)
-		err = primary_core_init(argc, argv, &sof);
-#if CONFIG_MULTICORE
-	else
-		err = secondary_core_init(&sof);
-#endif
-
-	/* should never get here */
-	sof_panic(SOF_IPC_PANIC_TASK);
-	return err;
-}
-
-#else
-
 int sof_main(int argc, char *argv[])
 {
 	trace_point(TRACE_BOOT_START);
@@ -372,4 +259,3 @@ static int sof_init(void)
 }
 
 SYS_INIT(sof_init, POST_KERNEL, 99);
-#endif

src/lib/clk.c

@@ -83,35 +83,6 @@ void clock_low_power_mode(int clock, bool enable)
 		clk_info->low_power_mode(clock, enable);
 }
 
-#ifndef __ZEPHYR__
-uint64_t clock_ms_to_ticks(int clock, uint64_t ms)
-{
-	struct clock_info *clk_info = clocks_get() + clock;
-	uint64_t ticks;
-
-	ticks = clk_info->freqs[clk_info->current_freq_idx].ticks_per_msec * ms;
-
-	return ticks;
-}
-
-uint64_t clock_us_to_ticks(int clock, uint64_t us)
-{
-	struct clock_info *clk_info = clocks_get() + clock;
-	uint64_t ticks;
-
-	ticks = clk_info->freqs[clk_info->current_freq_idx].ticks_per_msec * us / 1000ULL;
-
-	return ticks;
-}
-
-uint64_t clock_ns_to_ticks(int clock, uint64_t ns)
-{
-	struct clock_info *clk_info = clocks_get() + clock;
-
-	return clk_info->freqs[clk_info->current_freq_idx].ticks_per_msec * ns / 1000000ULL;
-}
-#endif /* __ZEPHYR__ */
-
 uint64_t clock_ticks_per_sample(int clock, uint32_t sample_rate)
 {
 	struct clock_info *clk_info = clocks_get() + clock;

src/lib/cpu-clk-manager.c

@@ -11,9 +11,7 @@
 #include <rtos/clk.h>
 #include <sof/math/numbers.h>
 #include <errno.h>
-#ifdef __ZEPHYR__
 #include <zephyr/sys/util.h>
-#endif /* __ZEPHYR__ */
 
 static struct kcps_budget_data kcps_data;
 

src/lib/pm_runtime.c

@@ -20,9 +20,7 @@
 #include <ipc/topology.h>
 #include <stdint.h>
 
-#if defined(__ZEPHYR__)
 #include <zephyr/pm/policy.h>
-#endif
 
 LOG_MODULE_REGISTER(pm_runtime, CONFIG_SOF_LOG_LEVEL);
 
@@ -132,7 +130,7 @@ bool pm_runtime_is_active(enum pm_runtime_context context, uint32_t index)
 {
 	tr_dbg(&pm_tr, "pm_runtime_is_active() context %d index %d", context,
 	       index);
-#if defined(__ZEPHYR__) && defined(CONFIG_PM)
+#if defined(CONFIG_PM)
 	return pm_policy_state_lock_is_active(PM_STATE_RUNTIME_IDLE, PM_ALL_SUBSTATES);
 #else
 	switch (context) {

src/platform/ace30/include/platform/lib/memory.h

@@ -11,9 +11,7 @@
 #define __PLATFORM_LIB_MEMORY_H__
 
 /* prioritize definitions in Zephyr SoC layer */
-#ifdef __ZEPHYR__
 #include <adsp_memory.h>
-#endif
 
 #include <ace/lib/memory.h>
 #include <mem_window.h>

src/platform/amd/rembrandt/lib/CMakeLists.txt

@@ -4,5 +4,4 @@ add_local_sources(sof
 	clk.c
 	dai.c
 	dma.c
-	memory.c
 )

src/platform/amd/rembrandt/lib/memory.c

@@ -123,23 +123,13 @@ const struct ext_man_windows xsram_window
 	},
 };
 
-#ifndef __ZEPHYR__
-static SHARED_DATA struct timer timer = {
-	.id = TIMER0,
-	.irq = IRQ_NUM_TIMER0,
-};
-#endif
-
 int platform_init(struct sof *sof)
 {
 	int ret;
-#ifndef __ZEPHYR__
-	sof->platform_timer = &timer;
-	sof->cpu_timers = &timer;
-#else
+
 	/* initialize cascade interrupts before any usage */
 	interrupt_init(sof);
-#endif
+
 	/* to view system memory */
 	platform_interrupt_init();
 	platform_clock_init(sof);
@@ -149,9 +139,7 @@ int platform_init(struct sof *sof)
 	sof->platform_timer_domain = timer_domain_init(sof->platform_timer,
 						PLATFORM_DEFAULT_CLOCK);
 	scheduler_init_ll(sof->platform_timer_domain);
-#ifndef __ZEPHYR__
-	platform_timer_start(sof->platform_timer);
-#endif
+
 	/*CONFIG_SYSTICK_PERIOD hardcoded as 200000*/
 	sa_init(sof, 200000);
 	clock_set_freq(CLK_CPU(cpu_get_id()), CLK_MAX_CPU_HZ);
@@ -202,14 +190,8 @@ int platform_boot_complete(uint32_t boot_message)
 	clock_set_freq(CLK_CPU(cpu_get_id()), CLK_DEFAULT_CPU_HZ);
 	return 0;
 }
+
 int platform_context_save(struct sof *sof)
 {
 	return 0;
 }
-
-#ifndef __ZEPHYR__
-void platform_wait_for_interrupt(int level)
-{
-	arch_wait_for_interrupt(level);
-}
-#endif