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Marcin Maka
committed
dai: ssp: dynamic device descriptor initialization
This is a first step for run-time HW discovery on cavs platforms. Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
1 parent b971739 commit 550180a

7 files changed

Lines changed: 32 additions & 145 deletions

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‎src/platform/apollolake/include/platform/interrupt.h‎

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -124,18 +124,10 @@
124124
SOF_IRQ(IRQ_BIT_LVL5_LP_GP_DMA0(channel), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
125125
#define IRQ_EXT_LP_GPDMA1_LVL5(xcpu, channel) \
126126
SOF_IRQ(IRQ_BIT_LVL5_LP_GP_DMA1(channel), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
127-
#define IRQ_EXT_SSP0_LVL5(xcpu) \
128-
SOF_IRQ(IRQ_BIT_LVL5_SSP(0), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
129-
#define IRQ_EXT_SSP1_LVL5(xcpu) \
130-
SOF_IRQ(IRQ_BIT_LVL5_SSP(1), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
131-
#define IRQ_EXT_SSP2_LVL5(xcpu) \
132-
SOF_IRQ(IRQ_BIT_LVL5_SSP(2), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
133-
#define IRQ_EXT_SSP3_LVL5(xcpu) \
134-
SOF_IRQ(IRQ_BIT_LVL5_SSP(3), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
135-
#define IRQ_EXT_SSP4_LVL5(xcpu) \
136-
SOF_IRQ(IRQ_BIT_LVL5_SSP(4), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
137-
#define IRQ_EXT_SSP5_LVL5(xcpu) \
138-
SOF_IRQ(IRQ_BIT_LVL5_SSP(5), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
127+
128+
#define IRQ_EXT_SSPx_LVL5(x, xcpu) \
129+
SOF_IRQ(IRQ_BIT_LVL5_SSP(x), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
130+
139131
#define IRQ_EXT_DMIC_LVL5(xcpu) \
140132
SOF_IRQ(IRQ_BIT_LVL5_DMIC, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
141133

‎src/platform/apollolake/include/platform/memory.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -261,7 +261,7 @@
261261

262262
/* bss data */
263263
#define SOF_BSS_DATA_START (SOF_TEXT_BASE + SOF_TEXT_SIZE + SOF_DATA_SIZE)
264-
#define SOF_BSS_DATA_SIZE 0x8700
264+
#define SOF_BSS_DATA_SIZE 0x9000
265265

266266
/* Stack configuration */
267267
#define SOF_STACK_SIZE 0x1000

‎src/platform/cannonlake/include/platform/interrupt.h‎

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -125,14 +125,10 @@
125125
SOF_ID_IRQ(0, IRQ_BIT_LVL5_LP_GP_DMA0, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
126126
#define IRQ_EXT_LP_GPDMA1_LVL5(xcpu, channel) \
127127
SOF_ID_IRQ(1, IRQ_BIT_LVL5_LP_GP_DMA0, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
128-
#define IRQ_EXT_SSP0_LVL5(xcpu) \
129-
SOF_IRQ(IRQ_BIT_LVL5_SSP(0), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
130-
#define IRQ_EXT_SSP1_LVL5(xcpu) \
131-
SOF_IRQ(IRQ_BIT_LVL5_SSP(1), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
132-
#define IRQ_EXT_SSP2_LVL5(xcpu) \
133-
SOF_IRQ(IRQ_BIT_LVL5_SSP(2), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
134-
#define IRQ_EXT_SSP3_LVL5(xcpu) \
135-
SOF_IRQ(IRQ_BIT_LVL5_SSP(3), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
128+
129+
#define IRQ_EXT_SSPx_LVL5(x, xcpu) \
130+
SOF_IRQ(IRQ_BIT_LVL5_SSP(x), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
131+
136132
#define IRQ_EXT_DMIC_LVL5(xcpu) \
137133
SOF_IRQ(IRQ_BIT_LVL5_DMIC, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
138134

‎src/platform/cannonlake/include/platform/memory.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -231,7 +231,7 @@
231231
/* text and data share the same HP L2 SRAM on Cannonlake */
232232
#define SOF_TEXT_START 0xBE040400
233233
#define SOF_TEXT_BASE (SOF_TEXT_START)
234-
#define SOF_TEXT_SIZE (0x1a000 - 0x400)
234+
#define SOF_TEXT_SIZE (0x1b000 - 0x400)
235235

236236
/* initialized data */
237237
#define SOF_DATA_START (SOF_TEXT_BASE + SOF_TEXT_SIZE)

‎src/platform/icelake/include/platform/interrupt.h‎

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -125,14 +125,10 @@
125125
SOF_ID_IRQ(0, IRQ_BIT_LVL5_LP_GP_DMA0, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
126126
#define IRQ_EXT_LP_GPDMA1_LVL5(xcpu, channel) \
127127
SOF_ID_IRQ(1, IRQ_BIT_LVL5_LP_GP_DMA0, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
128-
#define IRQ_EXT_SSP0_LVL5(xcpu) \
129-
SOF_IRQ(IRQ_BIT_LVL5_SSP(0), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
130-
#define IRQ_EXT_SSP1_LVL5(xcpu) \
131-
SOF_IRQ(IRQ_BIT_LVL5_SSP(1), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
132-
#define IRQ_EXT_SSP2_LVL5(xcpu) \
133-
SOF_IRQ(IRQ_BIT_LVL5_SSP(2), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
134-
#define IRQ_EXT_SSP3_LVL5(xcpu) \
135-
SOF_IRQ(IRQ_BIT_LVL5_SSP(3), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
128+
129+
#define IRQ_EXT_SSPx_LVL5(x, xcpu) \
130+
SOF_IRQ(IRQ_BIT_LVL5_SSP(x), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
131+
136132
#define IRQ_EXT_DMIC_LVL5(xcpu) \
137133
SOF_IRQ(IRQ_BIT_LVL5_DMIC, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
138134

‎src/platform/intel/cavs/dai.c‎

Lines changed: 14 additions & 107 deletions
Original file line numberDiff line numberDiff line change
@@ -47,112 +47,7 @@
4747
#include <string.h>
4848
#include <config.h>
4949

50-
static struct dai ssp[] = {
51-
{
52-
.type = SOF_DAI_INTEL_SSP,
53-
.index = 0,
54-
.plat_data = {
55-
.base = SSP_BASE(0),
56-
.irq = IRQ_EXT_SSP0_LVL5(0),
57-
.fifo[SOF_IPC_STREAM_PLAYBACK] = {
58-
.offset = SSP_BASE(0) + SSDR,
59-
.handshake = DMA_HANDSHAKE_SSP0_TX,
60-
},
61-
.fifo[SOF_IPC_STREAM_CAPTURE] = {
62-
.offset = SSP_BASE(0) + SSDR,
63-
.handshake = DMA_HANDSHAKE_SSP0_RX,
64-
}
65-
},
66-
.ops = &ssp_ops,
67-
},
68-
{
69-
.type = SOF_DAI_INTEL_SSP,
70-
.index = 1,
71-
.plat_data = {
72-
.base = SSP_BASE(1),
73-
.irq = IRQ_EXT_SSP1_LVL5(0),
74-
.fifo[SOF_IPC_STREAM_PLAYBACK] = {
75-
.offset = SSP_BASE(1) + SSDR,
76-
.handshake = DMA_HANDSHAKE_SSP1_TX,
77-
},
78-
.fifo[SOF_IPC_STREAM_CAPTURE] = {
79-
.offset = SSP_BASE(1) + SSDR,
80-
.handshake = DMA_HANDSHAKE_SSP1_RX,
81-
}
82-
},
83-
.ops = &ssp_ops,
84-
},
85-
{
86-
.type = SOF_DAI_INTEL_SSP,
87-
.index = 2,
88-
.plat_data = {
89-
.base = SSP_BASE(2),
90-
.irq = IRQ_EXT_SSP2_LVL5(0),
91-
.fifo[SOF_IPC_STREAM_PLAYBACK] = {
92-
.offset = SSP_BASE(2) + SSDR,
93-
.handshake = DMA_HANDSHAKE_SSP2_TX,
94-
},
95-
.fifo[SOF_IPC_STREAM_CAPTURE] = {
96-
.offset = SSP_BASE(2) + SSDR,
97-
.handshake = DMA_HANDSHAKE_SSP2_RX,
98-
}
99-
},
100-
.ops = &ssp_ops,
101-
},
102-
#if defined(CONFIG_APOLLOLAKE)
103-
{
104-
.type = SOF_DAI_INTEL_SSP,
105-
.index = 3,
106-
.plat_data = {
107-
.base = SSP_BASE(3),
108-
.irq = IRQ_EXT_SSP3_LVL5(0),
109-
.fifo[SOF_IPC_STREAM_PLAYBACK] = {
110-
.offset = SSP_BASE(3) + SSDR,
111-
.handshake = DMA_HANDSHAKE_SSP3_TX,
112-
},
113-
.fifo[SOF_IPC_STREAM_CAPTURE] = {
114-
.offset = SSP_BASE(3) + SSDR,
115-
.handshake = DMA_HANDSHAKE_SSP3_RX,
116-
}
117-
},
118-
.ops = &ssp_ops,
119-
},
120-
{
121-
.type = SOF_DAI_INTEL_SSP,
122-
.index = 4,
123-
.plat_data = {
124-
.base = SSP_BASE(4),
125-
.irq = IRQ_EXT_SSP4_LVL5(0),
126-
.fifo[SOF_IPC_STREAM_PLAYBACK] = {
127-
.offset = SSP_BASE(4) + SSDR,
128-
.handshake = DMA_HANDSHAKE_SSP4_TX,
129-
},
130-
.fifo[SOF_IPC_STREAM_CAPTURE] = {
131-
.offset = SSP_BASE(4) + SSDR,
132-
.handshake = DMA_HANDSHAKE_SSP4_RX,
133-
}
134-
},
135-
.ops = &ssp_ops,
136-
},
137-
{
138-
.type = SOF_DAI_INTEL_SSP,
139-
.index = 5,
140-
.plat_data = {
141-
.base = SSP_BASE(5),
142-
.irq = IRQ_EXT_SSP5_LVL5(0),
143-
.fifo[SOF_IPC_STREAM_PLAYBACK] = {
144-
.offset = SSP_BASE(5) + SSDR,
145-
.handshake = DMA_HANDSHAKE_SSP5_TX,
146-
},
147-
.fifo[SOF_IPC_STREAM_CAPTURE] = {
148-
.offset = SSP_BASE(5) + SSDR,
149-
.handshake = DMA_HANDSHAKE_SSP5_RX,
150-
}
151-
},
152-
.ops = &ssp_ops,
153-
},
154-
#endif
155-
};
50+
static struct dai ssp[(DAI_NUM_SSP_BASE + DAI_NUM_SSP_EXT)];
15651

15752
#if defined CONFIG_DMIC
15853

@@ -230,8 +125,20 @@ int dai_init(void)
230125
int i;
231126

232127
/* init ssp */
233-
/* TODO: move all the properties initialization here */
234128
for (i = 0; i < ARRAY_SIZE(ssp); i++) {
129+
ssp[i].type = SOF_DAI_INTEL_SSP;
130+
ssp[i].index = i;
131+
ssp[i].ops = &ssp_ops;
132+
ssp[i].plat_data.base = SSP_BASE(i);
133+
ssp[i].plat_data.irq = IRQ_EXT_SSPx_LVL5(i, 0);
134+
ssp[i].plat_data.fifo[SOF_IPC_STREAM_PLAYBACK].offset =
135+
SSP_BASE(i) + SSDR;
136+
ssp[i].plat_data.fifo[SOF_IPC_STREAM_PLAYBACK].handshake =
137+
DMA_HANDSHAKE_SSP0_TX + 2 * i;
138+
ssp[i].plat_data.fifo[SOF_IPC_STREAM_CAPTURE].offset =
139+
SSP_BASE(i) + SSDR;
140+
ssp[i].plat_data.fifo[SOF_IPC_STREAM_CAPTURE].handshake =
141+
DMA_HANDSHAKE_SSP0_RX + 2 * i;
235142
/* initialize spin locks early to enable ref counting */
236143
spinlock_init(&ssp[i].lock);
237144
}

‎src/platform/suecreek/include/platform/interrupt.h‎

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -127,14 +127,10 @@
127127
SOF_ID_IRQ(0, IRQ_BIT_LVL5_LP_GP_DMA0, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
128128
#define IRQ_EXT_LP_GPDMA1_LVL5(xcpu, channel) \
129129
SOF_ID_IRQ(1, IRQ_BIT_LVL5_LP_GP_DMA0, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
130-
#define IRQ_EXT_SSP0_LVL5(xcpu) \
131-
SOF_IRQ(IRQ_BIT_LVL5_SSP(0), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
132-
#define IRQ_EXT_SSP1_LVL5(xcpu) \
133-
SOF_IRQ(IRQ_BIT_LVL5_SSP(1), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
134-
#define IRQ_EXT_SSP2_LVL5(xcpu) \
135-
SOF_IRQ(IRQ_BIT_LVL5_SSP(2), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
136-
#define IRQ_EXT_SSP3_LVL5(xcpu) \
137-
SOF_IRQ(IRQ_BIT_LVL5_SSP(3), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
130+
131+
#define IRQ_EXT_SSPx_LVL5(x, xcpu) \
132+
SOF_IRQ(IRQ_BIT_LVL5_SSP(x), 5, xcpu, IRQ_NUM_EXT_LEVEL5)
133+
138134
#define IRQ_EXT_DMIC_LVL5(xcpu) \
139135
SOF_IRQ(IRQ_BIT_LVL5_DMIC, 5, xcpu, IRQ_NUM_EXT_LEVEL5)
140136

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